Demo Data from SIGIR 2026 / reviewers in the wild / expert
Parnian Mokri
dblp:02/11071
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 62% Electronic design automation · 38% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › accelerator orchestration
accelerator sharing |
0.4 | 1 | 2020 | Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-Tree · FPGA 2020 |
Electronic design automation
high-level synthesis |
0.1 | 1 | 2020 | Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-Tree · FPGA 2020 |
Electronic design automation › design representation
register transfer level analysis |
0.1 | 1 | 2020 | Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-Tree · FPGA 2020 |
Methods — techniques the papers use, named apart from their topics
abstract syntax tree analysis · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Early-stage Automated Identification Tool for Shared AcceleratorsabstractThe use of application-specific accelerators to improve systems’ energy-efficiency and performance is becoming more prevalent. To overcome the tight area budget on embedded systems we propose an early detection tool that complements existing High-level Synthesis tools by identifying computationally similar synthesizable kernels that are used to build Shared Accelerators (SAs). SAs are specialized hardware accelerators that execute very different software kernels but share the common hardware functions between them. SAs can provide increased coverage if similarities between the dataflow and control flow of seemingly very different workloads are detected. Existing methods use either dynamic traces or analyze register transfer level (RTL) implementations to find these similarities which requires deep knowledge of RTL and the time-consuming RTL design process. Parnian Mokri, Mark Hempstead |
FCCM | 1 |
| 2020 | Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-TreeabstractThe resource requirements of application-specific accelerators challenge embedded system designers who have a tight area budget but must cover a range of possible software kernels. We propose an early detection methodology (ReconfAST) to identify computationally similar synthesizable kernels to build Shared Accelerators (SAs). SAs are specialized hardware accelerators that execute very different software kernels but share the common hardware functions between them. SAs increase the fraction of workloads covered by specialized hardware by detecting similarities in dataflow and control flow between seemingly very different workloads. Existing methods use either dynamic traces or analyze register transfer level (RTL) implementations to find these similarities which require deep knowledge of RTL and time-consuming design process. Parnian Mokri, Maziar Amiraskari, Yuelin Liu, Mark Hempstead |
FPGA | 1 |
| 2020 | Early-stage Automated Accelerator Identification Tool for Embedded Systems with Limited AreaabstractDesigners are turning toward hardware specialization through the use of application-specific accelerators to provide energy-efficiency and performance. We propose an early detection methodology to identify computationally similar and synthesize-able kernels that are used to build Shared Accelerators (SAs). SAs are specialized hardware accelerators that execute very different software kernels but share the common hardware functions between them. SAs can provide increased coverage if both data flow and control flow similarities between - seemingly very different- workloads are detected. Parnian Mokri, Mark Hempstead |
ICCAD | 1 |