Demo Data from SIGIR 2026 / reviewers in the wild / expert
James Elliott
dblp:07/2491
· DBLP profile ↗
5ranked-venue papers
3as first author
1since 2021 · last 2025
0009-0005-3635-7874ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 3 first-author · 1 since 2021Security and privacy · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 89% High-performance computing · 6% Distributed systems · 6% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › parallel programming models › task parallelism
fork-join parallelism |
0.9 | 1 | 2025 | Libfork: Portable Continuation-Stealing With Stackless Coroutines · IEEE Trans. Parallel Distributed Syst. 2025 |
Parallel and multicore computing
parallel programming models |
0.9 | 1 | 2025 | Libfork: Portable Continuation-Stealing With Stackless Coroutines · IEEE Trans. Parallel Distributed Syst. 2025 |
Parallel and multicore computing
parallel programming runtimes |
0.9 | 1 | 2025 | Libfork: Portable Continuation-Stealing With Stackless Coroutines · IEEE Trans. Parallel Distributed Syst. 2025 |
Parallel and multicore computing › task scheduling › dynamic scheduling
work-stealing scheduler |
0.9 | 1 | 2025 | Libfork: Portable Continuation-Stealing With Stackless Coroutines · IEEE Trans. Parallel Distributed Syst. 2025 |
Distributed systems
fault tolerance |
0.2 | 1 | 2015 | A Numerical Soft Fault Model for Iterative Linear Solvers · HPDC 2015 |
High-performance computing › numerical linear algebra › linear solver
iterative linear solvers |
0.2 | 1 | 2015 | A Numerical Soft Fault Model for Iterative Linear Solvers · HPDC 2015 |
Methods — techniques the papers use, named apart from their topics
stackless coroutines · 0.9segmented stacks · 0.9NUMA optimization · 0.9numerical soft fault model · 0.2fault injection · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Libfork: Portable Continuation-Stealing With Stackless CoroutinesabstractFully-strict fork-join parallelism is a powerful model for shared-memory programming due to its optimal time-scaling and strong bounds on memory scaling. The latter is rarely achieved due to the difficulty of implementing continuation-stealing in traditional High Performance Computing (HPC) languages – where it is often impossible without modifying the compiler or resorting to non-portable techniques. We demonstrate how stackless-coroutines (a new feature in C++$\bm {20}$) can enable fully-portable continuation stealing and presentlibforka wait-free fine-grained parallelism library, combining coroutines with user-space, geometric segmented-stacks. We show our approach is able to achieve optimal time/memory scaling, both theoretically and empirically, across a variety of benchmarks. Compared to openMP (libomp), libfork is on average$7.2\times$faster and consumes$10\times$less memory. Similarly, compared to Intel's TBB, libfork is on average$2.7\times$faster and consumes$6.2\times$less memory. Additionally, we introduce non-uniform memory access (NUMA) optimizations for schedulers that demonstrate performance matchingbusy-waitingschedulers. Conor John Williams, James Elliott |
IEEE Trans. Parallel Distributed Syst. | 2 |
| 2015 | A Numerical Soft Fault Model for Iterative Linear SolversabstractWe present a fault model designed to bring out the "worst" in iterative solvers based on mathematical properties. Our model introduces substantially higher overhead, but smaller variance, than a fault model based on random bit flips. We also relate the statistics from our experiments back to the solvers' configuration, and briefly address the computational effort that each model requires. Our approach requires significantly fewer resources, while punishing our solvers with undetectable errors that require notable overhead for recovery. This work also illustrates the robustness of our resilient algorithms: Not only do we make forward progress in the presence of pathological faults, we always obtain the correct answer. James Elliott, Mark Hoemmen, Frank Mueller 0001 |
HPDC | 1 |
| 2014 | Evaluating the Impact of SDC on the GMRES Iterative SolverabstractIncreasing parallelism and transistor density, along with increasingly tighter energy and peak power constraints, may force exposure of occasionally incorrect computation or storage to application codes. Silent data corruption (SDC) will likely be infrequent, yet one SDC suffices to make numerical algorithms like iterative linear solvers cease progress towards the correct answer. Thus, we focus on resilience of the iterative linear solver GMRES to a single transient SDC. We derive inexpensive checks to detect the effects of an SDC in GMRES that work for a more general SDC model than presuming a bit flip. Our experiments show that when GMRES is used as the inner solver of an inner-outer iteration, it can "run through" SDC of almost any magnitude in the computationally intensive orthogonalization phase. That is, it gets the right answer using faulty data without any required roll back. Those SDCs which it cannot run through, get caught by our detection scheme. James Elliott, Mark Hoemmen, Frank Mueller 0001 |
IPDPS | 1 |
| 2012 | Combining Partial Redundancy and Checkpointing for HPCabstractToday's largest High Performance Computing (HPC) systems exceed one Petaflops (10^15) floating point operations per second) and exascale systems are projected within seven years. But reliability is becoming one of the major challenges faced by exascale computing. With billion-core parallelism, the mean time to failure is projected to be in the range of minutes or hours instead of days. Failures are becoming the norm rather than the exception during execution of HPC applications. Current fault tolerance techniques in HPC focus on reactive ways to mitigate faults, namely via checkpoint and restart (C/R). Apart from storage overheads, C/R-based fault recovery comes at an additional cost in terms of application performance because normal execution is disrupted when checkpoints are taken. Studies have shown that applications running at a large scale spend more than 50% of their total time saving checkpoints, restarting and redoing lost work. Redundancy is another fault tolerance technique, which employs redundant processes performing the same task. If a process fails, a replica of it can take over its execution. Thus, redundant copies can decrease the overall failure rate. The downside of redundancy is that extra resources are required and there is an additional overhead on communication and synchronization. This work contributes a model and analyzes the benefit of C/R in coordination with redundancy at different degrees to minimize the total wall clock time and resources utilization of HPC applications. We further conduct experiments with an implementation of redundancy within the MPI layer on a cluster. Our experimental results confirm the benefit of dual and triple redundancy -- but not for partial redundancy -- and show a close fit to the model. At ~80,000 processes, dual redundancy requires twice the number of processing resources for an application but allows two jobs of 128hours wall clock time to finish within the time of just one job without redundancy. For narrow ranges of processor counts, partial redundancy results in the lowest time. Once the count exceeds ~770,000, triple redundancy has the lowest overall cost. Thus, redundancy allows one to trade-off additional resource requirements against wall clock time, which provides a tuning knob for users to adapt to resource availabilities. James Elliott, Kishor Kharbas, David Fiala, Frank Mueller 0001, Kurt B. Ferreira, Christian Engelmann |
ICDCS | 1 |
| 2009 | Blue Gene/L Log Analysis and Time to Interrupt EstimationabstractSystem- and application-level failures could be characterized by analyzing relevant log files. The resulting data might then be used in numerous studies on and future developments for the mission-critical and large scale computational architecture, including fields such as failure prediction, reliability modeling, performance modeling and power awareness. In this paper, system logs covering a six month period of the Blue Gene/L supercomputer were obtained and subsequently analyzed. Temporal filtering was applied to remove duplicated log messages. Optimistic and pessimistic perspectives were exerted on filtered log information to observe failure behavior within the system. Further, various time to repair factors were applied to obtain application time to interrupt, which will be exploited in further resilience modeling research. Narate Taerat, Nichamon Naksinehaboon, Clayton Chandler, James Elliott, Chokchai Leangsuksun, George Ostrouchov, Stephen L. Scott, Christian Engelmann |
ARES | 4 |