We present a novel heuristic algorithm for two-level Boolean minimization. In contrast to the other approaches, the proposed method firstly finds the coverage of the on-sets and from that it derives the group implicants. No prime implicants of the single functions are being computed; only the necessary implicants needed to cover the on-sets are produced. This reverse approach makes the algorithm extremely fast and minimizes the memory demands. It is most efficient for functions with a large number of output variables, where the other minimization algorithms (e.g. ESPRESSO) are too slow. It is also very efficient for highly unspecified functions, i.e. functions with only few terms defined.

The paper presents the C-Sim simulation environment, which enables the execution of several processes in an interleaved mode using the global simulation lime concept. C-Sim was used within the EU/IST project Fault Injection for Time Triggered Architecture (FIT) to build a simulation model of TTP/C protocol based real-time embedded computer system in order to verify its dependability through fault injection.

The paper presents a new method of Boolean function minimization based on an original approach to implicant generation by inclusion of literals. The selection of these newly included literals, as well as the subsequent rejection of some others to obtain prime implicants, is based on heuristics working with the frequency of literal occurrence. Instead of using this data directly, some mutations are used in certain places in the algorithm. The technique of mutations and their influence on the quality of the result obtained is evaluated. The BOOM system implementing the proposed method is efficient especially for functions with several hundreds of input variables, whose values are defined only for a small part of their range. It has been tested both on standard benchmarks and on problems of a much larger dimension, generated randomly. These experiments proved that the new algorithm is very fast and that for large circuits it delivers better results than the state-of-the-art ESPRESSO.

We present a two-level Boolean minimization tool (BOOM) based on a new implicant generation paradigm. In contrast to all previous minimization methods, where the implicants are generated bottom-up, the proposed method uses a top-down approach. Thus instead of increasing the dimensionality of implicants by omitting literals from their terms, the dimension of a term is gradually decreased by adding new literals. Unlike most other minimization tools like ESPRESSO, BOOM does not use the definition of the function to be minimized as a basis for the solution, and thus the original coverage influences the solution only indirectly through the number of literals used. Most minimization methods use two basic phases introduced by Quine-McCluskey, known as prime implicant (PI) generation and the covering problem solution. Some more modern methods, like ESPRESSO, combine these two phases, reducing the number of PIs to be processed. This approach is also used in BOOM, where the search for new literals to be included into a term aims at maximum coverage of the output function. The function to be minimized is defined by its on-set and off-set, listed in a truth table. Thus the don't care set, often representing the dominant part of the truth table, need not be specified explicitly. The proposed minimization method is efficient above all for functions with a large number of input variables while only few care terms are defined. The minimization procedure is very fast, hence if the first solution does not meet the requirements, it can be improved in an iterative manner. The method has been tested on several different kinds of problems, like the MCNC standard benchmarks or larger problems generated randomly.

A method of pseudoexhaustive test pattern generation is proposed that is suitable above all for circuits using random access scan. Two linear feedback shift registers are used to generate scan addresses and test patterns to be scanned into these addresses. It is shown that the method gives better results than random testing.>

A method of essential hazard correction avoiding the insertion of delay elements into the feedback branches of an asynchronous switching circuit was suggested in a recent paper by Armstrong, Friedman, and Menon [4]. This method is always easily applicable when the line stray delays can be neglected, but the resulting circuit often contains branches with more than two levels of logical elements.