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Marc Davio

dblp:09/5147 · DBLP profile ↗
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15ranked-venue papers
8as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 4 first-authorSecurity and privacy · 4 · 2 first-authorTheory of computation · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
10 papers
Electronic design automation · 71% Integrated circuit design · 16% Parallel and multicore computing · 8%
Network and information security
4 papers
Cryptographic primitives and cryptanalysis · 100%

Topics — the 19 heaviest of 19, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.061991
A Unified Approach to Input-Output Encoding for FSM State Assignment · DAC 1991
PHIPLA-a new algorithm for logic minimization · DAC 1985
Synthesis of Discrete Functions Using I2L Technology · IEEE Trans. Computers 1981
Cryptographic primitives and cryptanalysis
block cipher
0.041985
The Importance of "Good" Key Scheduling Schemes (How to Make a Secure DES Scheme with <= 48 Bit Keys) · CRYPTO 1985
Dependence of Output on Input in DES: Small Avalanche Characteristics · CRYPTO 1984
Efficient Hardware and Software Implementations for the DES · CRYPTO 1984
Electronic design automation › logic synthesis › finite state machine synthesis
input and output encoding
0.011991
A Unified Approach to Input-Output Encoding for FSM State Assignment · DAC 1991
Cryptographic primitives and cryptanalysis › block cipher
DES
0.021985
The Importance of "Good" Key Scheduling Schemes (How to Make a Secure DES Scheme with <= 48 Bit Keys) · CRYPTO 1985
Dependence of Output on Input in DES: Small Avalanche Characteristics · CRYPTO 1984
Cryptographic primitives and cryptanalysis › block cipher
key schedule
0.011985
The Importance of "Good" Key Scheduling Schemes (How to Make a Secure DES Scheme with <= 48 Bit Keys) · CRYPTO 1985
Electronic design automation › logic synthesis
logic minimization
0.011985
PHIPLA-a new algorithm for logic minimization · DAC 1985
Parallel and multicore computing
parallel algorithms
0.011985
Insertion Networks · IEEE Trans. Computers 1985
Integrated circuit design
digital circuit design
0.021981
Synthesis of Discrete Functions Using I2L Technology · IEEE Trans. Computers 1981
Interconnection Structure of Injective Counters Composed Entirely of JK Flip-Flps · Inf. Control. 1977
Electronic design automation › logic synthesis
multiple-valued logic synthesis
0.011981
Synthesis of Discrete Functions Using I2L Technology · IEEE Trans. Computers 1981
Interconnection networks and networks-on-chip › switching network › multistage interconnection network
perfect shuffle
0.011981
Kronecker Products and Shuffle Algebra · IEEE Trans. Computers 1981
Integrated circuit design › digital circuit design
arithmetic circuit design
0.011980
Complex Number Arithmetic with Odd-Valued Logic · IEEE Trans. Computers 1980
Integrated circuit design › digital circuit design
sequential circuit design
0.011977
Interconnection Structure of Injective Counters Composed Entirely of JK Flip-Flps · Inf. Control. 1977
Electronic design automation › logic synthesis
programmable logic array
0.011985
PHIPLA-a new algorithm for logic minimization · DAC 1985
Cryptographic primitives and cryptanalysis › boolean functions
avalanche characteristic
0.011984
Dependence of Output on Input in DES: Small Avalanche Characteristics · CRYPTO 1984
Integrated circuit design › digital circuit design
cryptographic hardware
0.011984
Efficient Hardware and Software Implementations for the DES · CRYPTO 1984
Electronic design automation › logic synthesis
prime implicant generation
0.011973
Boolean Differential Calculus and its Application to Switching Theory · IEEE Trans. Computers 1973
Image and video processing › image transform › fourier transform
discrete fourier transform
0.011980
Complex Number Arithmetic with Odd-Valued Logic · IEEE Trans. Computers 1980
Integrated circuit design › digital circuit design
multivalued logic circuit
0.011980
Complex Number Arithmetic with Odd-Valued Logic · IEEE Trans. Computers 1980
Interconnection networks and networks-on-chip
network topology
0.011977
Interconnection Structure of Injective Counters Composed Entirely of JK Flip-Flps · Inf. Control. 1977

Methods — techniques the papers use, named apart from their topics

graph coloring · 0.0dichotomy · 0.0odd-radix arithmetic · 0.0current-mode threshold logic · 0.0truncated difference operation · 0.0kronecker product algebra · 0.0discrete fourier transform · 0.0
YearPublicationVenuePosition
1991 A Unified Approach to Input-Output Encoding for FSM State Assignment
abstract
A new theoretical formulation of the output encoding and state assignment targeting two-level logic implementations is presented.The formulation is based on a uniform representation of the input and output constraints.This allows to solve the input and output encoding problems, inherent in state assignment of FSM, simultaneously.The solution is based on the concept of dichotomy and graph coloring.
Maciej J. Ciesielski, Jia-Jye Shen, Marc Davio
DAC3
1990 PHIFACT, a Boolean Preprocessor for Multi-Level Logic Synthesis
abstract
PHIFACT is a multi-level Boolean optimization program characterized by a controlled time-area trade-off. Its first phase, the Boolean phase, uses Boolean techniques of decomposition and merging to carry out a structural analysis and, in particular, to detect shared circuit parts. Its second phase, the restructuring phase, carries out a systematic exploration of the area-time design space by applying a user controlled sequence of transformations minimizing a parameterized cost function. The obtained results show the feasibility of full Boolean computations and open the way to an important family of new structural analysis techniques.>
F. Crowet, Marc Davio, C. Dierieck, J. Durieu, G. Louis, Chantal Ykman-Couvreur
ICCAD2
1985 The Importance of "Good" Key Scheduling Schemes (How to Make a Secure DES Scheme with <= 48 Bit Keys)
Jean-Jacques Quisquater, Yvo Desmedt, Marc Davio
CRYPTO3
1985 PHIPLA-a new algorithm for logic minimization
abstract
PHIPLA, a new algorithm for logic minimization, is presented. The algorithm sets out to find optimal sum-of-products representations for a set of Boolean functions, thus contributing to area minimization of the Programmable Logic Array corresponding to the set of functions.
Peter J. M. van Laarhoven, Emile H. L. Aarts, Marc Davio
DAC3
1985 Insertion Networks
abstract
The problem of inserting an item in a list is frequently encountered in various application fields such as sorting, compiling, etc. It is shown that the insertion of an item in a list of N members may be realized at a cost proportional to N and within a delay proportional to log N.
Marc Davio, Christian Ronse
IEEE Trans. Computers1
1984 Efficient Hardware and Software Implementations for the DES
Marc Davio, Yvo Desmedt, Jo Goubert, Frank Hoornaert, Jean-Jacques Quisquater
CRYPTO1
1984 Dependence of Output on Input in DES: Small Avalanche Characteristics
Yvo Desmedt, Jean-Jacques Quisquater, Marc Davio
CRYPTO3
1983 Analytical Characteristics of the DES
Marc Davio, Yvo Desmedt, Marc Fosseprez, René Govaerts, Jan Hulsbosch, Patrik Neutjens, Philippe Piret, Jean-Jacques Quisquater, Joos Vandewalle, Pascal Wouters
CRYPTO1
1983 Rotator design
Marc Davio, Christian Ronse
Discret. Appl. Math.1
1981 Kronecker Products and Shuffle Algebra
abstract
Relates three classical concepts, viz. mixed radix number system, Kronecker product of matrices, and perfect shuffle. It presents an algebra which describes the hardware organization of the computation of a productMv, whereMis a matrix in Kronecker product form andvis a vector. The algebraic formalism describes both the blockwise structure of the computation and the various possible connection patterns.
Marc Davio
IEEE Trans. Computers1
1981 Synthesis of Discrete Functions Using I2L Technology
abstract
Algebraic methods for designing multiple-valued I2L circuits are presented. A new operation, namely the truncated difference, is introduced and proved to be an efficient tool for both analyzing and synthesizing circuits.
Marc Davio, Jean-Pierre Deschamps
IEEE Trans. Computers1
1980 Complex Number Arithmetic with Odd-Valued Logic
abstract
Digital signal processing such as discrete Fourier transform requires complex number arithmetic. Number-theoretical properties favor odd-radix systems for simple implementation of complex number operations. An array ternary complex multiplier is presented and compared to other complex multipliers. As an illustration, a perfectly balanced ternary system is implemented by means of current-mode threshold logic gates.
Tich T. Dao, Marc Davio, Colette Gossart
IEEE Trans. Computers2
1980 Read-Only Memory Implementation of Discrete Function
abstract
Residue-based designs are shown to exist for a particular class of discrete functions called regular functions. If the design uses read-only memories (ROM's) only, it may be shown that the cost of the residue-based design may become significantly smaller than the cost of the straightforward tabular approach when the number of distinct function values is small with respect to the number of points in the definition domain.
Marc Davio
IEEE Trans. Computers1
1977 Interconnection Structure of Injective Counters Composed Entirely of JK Flip-Flps
Marc Davio, G. Bioul
Inf. Control.1
1973 Boolean Differential Calculus and its Application to Switching Theory
abstract
After a brief outline of classical concepts relative to Boolean differential calculus, a theoretical study of the main differential operators is undertaken. Algebraic equations relating the classical concepts of prime implicants and of the discrete Fourier transform of a Boolean function to the differential operators are derived. Application of these concepts to several important problems arising in switching practice is mentioned.
André Thayse, Marc Davio
IEEE Trans. Computers2