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Vivek Pandey

dblp:09/6405 · DBLP profile ↗
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4ranked-venue papers
3as first author
2since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 1 since 2021Artificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Energy-efficient computing · 54% Memory systems · 33% Performance modeling and evaluation · 13%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › power management
memory power management
0.122006
DMA-aware memory energy management · HPCA 2006
Dynamic tracking of page miss ratio curve for memory management · ASPLOS 2004
Operating systems › resource management › memory management
memory allocation
0.012004
Dynamic tracking of page miss ratio curve for memory management · ASPLOS 2004
Operating systems › resource management › memory management
virtual memory
0.012004
Dynamic tracking of page miss ratio curve for memory management · ASPLOS 2004
Memory systems
memory management
0.012004
Dynamic tracking of page miss ratio curve for memory management · ASPLOS 2004
Performance modeling and evaluation › simulation › discrete-event simulation
trace-driven simulation
0.012006
DMA-aware memory energy management · HPCA 2006

Methods — techniques the papers use, named apart from their topics

simulation · 0.1hardware performance monitor · 0.1OS-level tracking · 0.1trace-driven simulation · 0.1
YearPublicationVenuePosition
2025 Enhanced multiclass heart disease classification through advanced signal processing with modified mixed attention mechanism-based deep BiLSTM
Vivek Pandey, Umesh Kumar Lilhore, Ranjan Walia
Multim. Tools Appl.1
2024 Scalable Networked Feature Selection with Randomized Algorithm for Robot Navigation
abstract
We address the problem of sparse selection of visual features for localizing a team of robots navigating in an unknown environment, where robots can exchange relative position measurements with neighbors. We select a set of the most informative features by anticipating their importance in robots localization by simulating trajectories of robots over a prediction horizon. Through theoretical proofs, we establish a crucial connection between graph Laplacian and the importance of features. We leverage a scalable randomized algorithm for sparse sums of positive semidefinite matrices to efficiently select a set of the most informative features.
Vivek Pandey, Arash Amini, Guangyi Liu 0004, Ufuk Topcu, Qiyu Sun, Kostas Daniilidis, Nader Motee
IROS1
2006 DMA-aware memory energy management
abstract
As increasingly larger memories are used to bridge the widening gap between processor and disk speeds, main memory energy consumption is becoming increasingly dominant. Even though much prior research has been conducted on memory energy management, no study has focused on data servers, where main memory is predominantly accessed by DMAs instead of processors. In this paper, we study DMA-aware techniques for memory energy management in data servers. We first characterize the effect of DMA accesses on memory energy and show that, due to the mismatch between memory and I/O bus band-widths, significant energy is wasted when memory is idle but still active during DMA transfers. To reduce this waste, we propose two novel performance-directed energy management techniques that maximize the utilization of memory devices by increasing the level of concurrency between multiple DMA transfers from different I/O buses to the same memory device. We evaluate our techniques using a detailed trace-driven simulator, and storage and database server traces. The results show that our techniques can effectively minimize the amount of idle energy waste during DMA transfers and, consequently, conserve up to 38.6% more memory energy than previous approaches while providing similar performance.
Vivek Pandey, Weihang Jiang, Yuanyuan Zhou 0001, Ricardo Bianchini
HPCA1
2004 Dynamic tracking of page miss ratio curve for memory management
abstract
Memory can be efficiently utilized if the dynamic memory demands of applications can be determined and analyzed at run-time. The page miss ratio curve(MRC), i.e. page miss rate vs. memory size curve, is a good performance-directed metric to serve this purpose. However, dynamically tracking MRC at run time is challenging in systems with virtual memory because not every memory reference passes through the operating system (OS).This paper proposes two methods to dynamically track MRC of applications at run time. The first method is using a hardware MRC monitor that can track MRC at fine time granularity. Our simulation results show that this monitor has negligible performance and energy overheads. The second method is an OS-only implementation that can track MRC at coarse time granularity. Our implementation results on Linux show that it adds only 7--10% overhead.We have also used the dynamic MRC to guide both memory allocation for multiprogramming systems and memory energy management. Our real system experiments on Linux with applications including Apache Web Server show that the MRC-directed memory allocation can speed up the applications' execution/response time by up to a factor of 5.86 and reduce the number of page faults by up to 63.1%. Our execution-driven simulation results with SPEC2000 benchmarks show that the MRC-directed memory energy management can improve the Energy * Delay metric by 27--58% over previously proposed static and dynamic schemes.
Pin Zhou, Vivek Pandey, Jagadeesan Sundaresan, Anand Raghuraman
ASPLOS2