Demo Data from SIGIR 2026 / reviewers in the wild / expert
Richard Neves
dblp:11/1665
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 2001
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-authorSoftware engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
2 papers |
Operating systems · 60% Compilers and program optimization · 40% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
binary optimization |
0.0 | 1 | 1996 | Whole-Program Optimization for Time and Space Efficient Threads · ASPLOS 1996 |
Operating systems › resource management › process management
thread management |
0.0 | 1 | 1996 | Whole-Program Optimization for Time and Space Efficient Threads · ASPLOS 1996 |
Compilers and program optimization › interprocedural optimization
whole-program optimization |
0.0 | 1 | 1996 | Whole-Program Optimization for Time and Space Efficient Threads · ASPLOS 1996 |
Processor architecture and microarchitecture
multithreading |
0.0 | 1 | 1996 | Whole-Program Optimization for Time and Space Efficient Threads · ASPLOS 1996 |
Methods — techniques the papers use, named apart from their topics
register liveness analysis · 0.0control flow analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2001 | High-Performance Memory-Based Web Servers: Kernel and User-Space Performance
Philippe Joubert, Robert B. King, Richard Neves, Mark Russinovich, John M. Tracey |
USENIX ATC, General Track | 3 |
| 1997 | Threaded Runtime Support for Execution of Fine Grain Parallel Code on Coarse Grain Multiprocessors
Richard Neves, Bobby Schnabel |
J. Parallel Distributed Comput. | 1 |
| 1996 | Whole-Program Optimization for Time and Space Efficient ThreadsabstractModern languages and operating systems often encourage programmers to use threads, or independent control streams, to mask the overhead of some operations and simplify program structure. Multitasking operating systems use threads to mask communication latency, either with hardwares devices or users. Client-server applications typically use threads to simplify the complex control-flow that arises when multiple clients are used. Recently, the scientific computing community has started using threads to mask network communication latency in massively parallel architectures, allowing computation and communication to be overlapped. Lastly, some architectures implement threads in hardware, using those threads to tolerate memory latency.In general, it would be desirable if threaded programs could be written to expose the largest degree of parallelism possible, or to simplify the program design. However, threads incur time and space overheads, and programmers often compromise simple designs for performance. In this paper, we show how to reduce time and space thread overhead using control flow and register liveness information inferred after compilation. Our techniques work on binaries, are not specific to a particular compiler or thread library and reduce the the overall execution time of fine-grain threaded programs by ≈ 15-30%. We use execution-driven analysis and an instrumented operating system to show why the execution time is reduced and to indicate areas for future work. Dirk Grunwald, Richard Neves |
ASPLOS | 2 |