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Boon Seong Ang

dblp:12/4504 · DBLP profile ↗
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6ranked-venue papers
3as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 46% Interconnection networks and networks-on-chip · 30% Memory systems · 23%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence
0.011998
StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues · SC 1998
Processor architecture and microarchitecture
multicore design
0.011998
StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues · SC 1998
Interconnection networks and networks-on-chip
network interface
0.011998
StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues · SC 1998
Processor architecture and microarchitecture › multiprocessor architecture
scalable shared-memory multiprocessor
0.011998
StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues · SC 1998
Interconnection networks and networks-on-chip › network interface
programmable network interface
0.011998
StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues · SC 1998

Methods — techniques the papers use, named apart from their topics

message passing · 0.0firmware · 0.0
YearPublicationVenuePosition
2000 Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
abstract
This paper examines two Network Interface Card micro-architectures that support low latency, high bandwidth user level message passing in multi-user environments. The two are at different ends of a design spectrum-the Resident queues design relies completely on hardware, while the Non-resident queues design is heavily firmware driven. Through actual implementation of these designs and simulation-based micro-benchmark studies, we identify issues critical to the performance and functionality of the firmware-based approach. The firmware-based approach offers much flexibility at a moderate performance penalty, while the Resident design has superior performance for the functions it implements. This leads us to conclude that a hybrid design combining complete hardware support for common operations and a firmware implementation of less common functions achieves both high performance and flexibility.
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind 0001
IPDPS1
1998 Message passing support on StarT-Voyager
abstract
No single message passing mechanism can efficiently support all types of communication that commonly occur in most parallel or distributed programs. MIT's StarT-Voyager, a hybrid message passing/shared memory parallel machine, provides four message passing mechanisms to achieve high performance over a wide spectrum of communication types and sizes. Hardware and address translation enforced protection allows direct user-level access to message passing facilities in a multiuser environment. StarT-Voyager's protection scheme improves upon past designs by not requiring strictly synchronized gang-scheduling, and by supporting non-monolithic protection domains. To minimize the development effort and cost, the machine is designed to use unmodified commercial PowerPC 604-based SMP systems as the building block. A Network End-point Subsystem (NES) card which plugs into one of each SMP's processor card slots provides the interface to Arctic, a low-latency, high-bandwidth network developed at MIT. This paper describes StarT-Voyager's message passing mechanisms and their predicted performance.
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind 0001
HiPC1
1998 StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues
abstract
This paper describes StarT-Voyager, a machine designed as an experimental platform for research in cluster system communication. The heart of StarT-Voyager is a network interface unit (NIU) that connects the memory bus of a PowerPC-based SMP to the MIT Arctic network. The NIU is highly flexible, with its set of functions easily modified by firmware or by programmable hardware, making it possible to compare different communication interfaces and implementation strategies on a common platform. Its flexibility comes from a fast embedded processor and large, fast FPGAs that surround a high-speed protected communication core. Its efficiency comes from a set of primitive operations that are implemented in hardware and are designed to reduce the firmware overhead. Our initial configuration of StarT-Voyager implements four forms of message passing along with S-COMA and NUMA shared memory support. With experimentation on the machine, it can be reconfigured to introduce new mechanisms improving usability and performance.
Boon Seong Ang, Derek Chiou, Daniel L. Rosenband, Mike Ehrlich, Larry Rudolph, Arvind 0001
SC1
1995 START-NG: Delivering Seamless Parallel Computing
Derek Chiou, Boon Seong Ang, Robert Greiner, Arvind 0001, James C. Hoe, Michael J. Beckerle, James E. Hicks, G. Andrew Boughton
Euro-Par2
1993 Performance Studies of Id on the Monsoon Dataflow System
James E. Hicks, Derek Chiou, Boon Seong Ang, Arvind 0001
J. Parallel Distributed Comput.3
1993 Performance Visualization on Monsoon
Venkat Natarajan, Derek Chiou, Boon Seong Ang
J. Parallel Distributed Comput.3