Demo Data from SIGIR 2026 / reviewers in the wild / expert
Xinyuan Qu
dblp:121/1159
· DBLP profile ↗
2ranked-venue papers
1as first author
2since 2021 · last 2023
0000-0002-9740-4225ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Computer networks · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Distributed systems · 23% GPUs and heterogeneous computing · 23% Reconfigurable computing and FPGAs · 18% |
Topics — the 3 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Distributed systems › distributed machine learning
distributed deep learning |
0.7 | 1 | 2023 | ARK: GPU-driven Code Execution for Distributed Deep Learning · NSDI 2023 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
CNN accelerator |
0.5 | 1 | 2021 | Cheetah: An Accurate Assessment Mechanism and a High-Throughput Acceleration Architecture Oriented Toward Resource Efficiency · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Reconfigurable computing and FPGAs
FPGA accelerator |
0.5 | 1 | 2021 | Cheetah: An Accurate Assessment Mechanism and a High-Throughput Acceleration Architecture Oriented Toward Resource Efficiency · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
deep learning · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | ARK: GPU-driven Code Execution for Distributed Deep Learning
Changho Hwang, KyoungSoo Park, Ran Shu 0001, Xinyuan Qu, Peng Cheng 0005, Yongqiang Xiong |
NSDI | 4 |
| 2021 | Cheetah: An Accurate Assessment Mechanism and a High-Throughput Acceleration Architecture Oriented Toward Resource EfficiencyabstractConvolutional neural network (CNN) is widely used in artificial intelligence for its excellent recognition accuracy. With its scale increasing rapidly and architecture becoming complicated, it is much difficult to implement CNN in hardware platform efficiently. Many FPGA-based CNN accelerators are proposed in previous work. However, when evaluating resource efficiency, their assessment methods are: 1) device related; 2) frequency related; or 3) they confuse resource efficiency with resource occupancy. There is an insistent demand for intuitive and fair assessment criteria. When implementing CNNs, they still have improvement room in computing resource efficiency, especially for layers with large feature size and few feature maps. In this work, we propose Rscoreand Cscore, which compose a comprehensive and accurate resource efficiency assessment mechanism for evaluation and design guidance, respectively. Under the guidance, we introduce Cheetah, an FPGA-based high-throughput acceleration architecture. Its computing part can optimize the use of available resources in both time and space aspects, resulting in better throughput improvement. An auxiliary storage system and a pipeline stage compression method are designed for less storage overhead and shorter inference latency. We implement AlexNet and ResNet18 on KCU1500 at 230 and 240 MHz, respectively, with a throughput of 2411.01GOP/s and 2435.05GOP/s for 16-bit quantification. Cheetah achieves an excellent average Rscoreof (0.9441, 0.9456) on different FPGA devices, while the others' mainly distribute between 0.3 and 0.8. Finally, Cheetah has 6.78X speed improvement and 1.87X power-efficiency improvement than that of Nvidia Jetson TX2, which is the fastest, most power-efficient embedded AI computing device. Xinyuan Qu, Gang Cai, Zhen Fang 0003 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |