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Yuki Niiyama

dblp:122/4197 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital circuit design
gan transistor		 0.112010
GaN Power Transistors on Si Substrates for Switching Applications · Proc. IEEE 2010
Integrated circuit design › semiconductor devices › heterostructure devices
heterojunction field-effect transistor		 0.112010
GaN Power Transistors on Si Substrates for Switching Applications · Proc. IEEE 2010
Integrated circuit design
power semiconductor devices		 0.112010
GaN Power Transistors on Si Substrates for Switching Applications · Proc. IEEE 2010
Integrated circuit design
power electronics		 0.012010
GaN Power Transistors on Si Substrates for Switching Applications · Proc. IEEE 2010
YearPublicationVenuePosition
2010 GaN Power Transistors on Si Substrates for Switching Applications
abstract
In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were examined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance (Ron) and a high breakdown voltage (Vb).
Nariaki Ikeda, Yuki Niiyama, Hiroshi Kambayashi, Yoshihiro Sato, Takehiko Nomura, Sadahiro Kato, Seikoh Yoshida
 Proc. IEEE2