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N. K. Natarajan

dblp:125/8721 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1969
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 62% Integrated circuit design · 38%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms › neuromorphic computing
associative memory
0.011969
A Multiaccess Associative Memory · IEEE Trans. Computers 1969
Integrated circuit design
digital circuit design
0.011969
A Multiaccess Associative Memory · IEEE Trans. Computers 1969
Integrated circuit design › digital circuit design › sequential logic
flip-flop memory
0.011969
A Multiaccess Associative Memory · IEEE Trans. Computers 1969

Methods — techniques the papers use, named apart from their topics

hardware design · 0.0
YearPublicationVenuePosition
1969 A Multiaccess Associative Memory
abstract
Accessing of more than one word truly simultaneously in time from the same memory module is termed multiaccess. An associative memory with such a capability can be made from reset-set flip-flops. There are practical limitations to the number of words that can be simultaneously accessed. Some hardware and software implications of multiaccessibility are discussed.
N. K. Natarajan, Paul A. V. Thomas
IEEE Trans. Computers1