While research has shown that the agile chip design methodology is promising to sustain the scaling of computing performance in a more efficient way, it is still of limited usage in actual applications due to two major obstacles: 1) Lack of tool-chain and developing framework supporting agile chip design, especially for large-scale modern processors. 2) The conventional verification methods are less agile and become a major bottleneck of the entire process. To tackle both issues, we propose MINJIE, an open-source platform supporting agile processor development flow. MINJIE integrates a broad set of tools for logic design, functional verification, performance modelling, pre-silicon validation and debugging for better development efficiency of state-of-the-art processor designs. We demonstrate the usage and effectiveness of MINJIE by building two generations of an open-source superscalar out-of-order RISC-V processor code-named XIANGSHAN using agile methodologies. We quantify the performance of XIANGSHAN using SPEC CPU2006 benchmarks and demonstrate that XIANGSHAN achieves industry-competitive performance.

Texture compression is a specialized form of still image compression employed in computer graphics systems to reduce memory bandwidth consumption. Modern texture compression schemes cannot generate satisfactory qualities for both alpha channel and color channel of texture images. We propose a novel texture compression scheme, named ImTC, based on the insight into the essential difference between transparency and color. ImTC defines new data formats and compresses the two channels flexibly. While keeping the same compression ratio as the de facto standard texture compression scheme, ImTC improves compression qualities of both channels. The average PSNR score of alpha channel is improved by about 0.2 dB, and that of color channel can be increased by 6.50 dB over a set of test images, which makes ImTC a better substitute for the standard scheme.