Demo Data from SIGIR 2026 / reviewers in the wild / expert
Eric J. Tyson
dblp:13/5578
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2007
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 62% Hardware accelerators and domain-specific architectures · 19% Performance modeling and evaluation · 19% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › parallel programming models
dataflow programming |
0.1 | 1 | 2007 | Application development on hybrid systems · SC 2007 |
Performance modeling and evaluation › simulation › simulation-based evaluation
simulation-based performance estimation |
0.0 | 1 | 2007 | Application development on hybrid systems · SC 2007 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.1data-flow semantics · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2007 | Application development on hybrid systemsabstractHybrid systems consisting of a multitude of different computing device types are interesting targets for high-performance applications. Chip multiprocessors, FPGAs, DSPs, and GPUs can be readily put together into a hybrid system; however, it is not at all clear that one can effectively deploy applications on such a system. Coordinating multiple languages, especially very different languages like hardware and software languages, is awkward and error prone. Additionally, implementing communication mechanisms between different device types unnecessarily increases development time. This is compounded by the fact that the application developer, to be effective, needs performance data about the application early in the design cycle. We describe an application development environment specifically targeted at hybrid systems, supporting data-flow semantics between application kernels deployed on a variety of device types. A specific feature of the development environment is the availability of performance estimates (via simulation) prior to actual deployment on a physical system. Roger D. Chamberlain, Mark A. Franklin, Eric J. Tyson, Jeremy Buhler, Saurabh Gayen, Patrick Crowley, James H. Buckley |
SC | 3 |
| 2006 | Auto-pipe and the X language: a pipeline design tool and description languageabstractAuto-Pipe is a tool that aids in the design, evaluation and implementation of applications that can be executed on computational pipelines (and other topologies) using a set of heterogeneous devices including multiple processors and FPGAs. It has been developed to meet the needs arising in the domains of communications, computation on large datasets, and real time streaming data applications. This paper introduces the Auto-Pipe design flow and the X design language, and presents sample applications. The applications include the Triple-DES encryption standard, a subset of the signal-processing pipeline for VERITAS, a high-energy gamma-ray astrophysics experiment. These applications are discussed and their description in X is presented. From X, simulations of alternative system designs and stage-to-device assignments are obtained and analyzed. The complete system permits production of executable code and bit maps that may be downloaded onto real devices. Future work required to complete the Auto-Pipe design tool is discussed. Mark A. Franklin, Eric J. Tyson, James H. Buckley, Patrick Crowley, John Maschmeyer |
IPDPS | 2 |