Demo Data from SIGIR 2026 / reviewers in the wild / expert
Lu Hao
dblp:132/8135
· DBLP profile ↗
5ranked-venue papers
2as first author
3since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorArtificial intelligence and machine learning · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
analog and mixed-signal circuits |
0.8 | 1 | 2024 | High-Al-composition AlGaN/GaN MISHEMT on Si with fT of 320 GHz · Sci. China Inf. Sci. 2024 |
Integrated circuit design › semiconductor devices › heterostructure devices
high electron mobility transistor |
0.8 | 1 | 2024 | High-Al-composition AlGaN/GaN MISHEMT on Si with fT of 320 GHz · Sci. China Inf. Sci. 2024 |
Integrated circuit design › semiconductor devices
GaN HEMT |
0.2 | 1 | 2024 | High-Al-composition AlGaN/GaN MISHEMT on Si with fT of 320 GHz · Sci. China Inf. Sci. 2024 |
Integrated circuit design
semiconductor devices |
0.2 | 1 | 2024 | High-Al-composition AlGaN/GaN MISHEMT on Si with fT of 320 GHz · Sci. China Inf. Sci. 2024 |
Methods — techniques the papers use, named apart from their topics
MISHEMT · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Federated Learning Meets Test-Time Adaptation: Methods, Challenges, and Future Directions
Ge Su, Huaxiao Zhou, Lu Hao, Feng Zhu 0004, Jintai Chen, Jianwei Yin |
Int. J. Comput. Vis. | 4 |
| 2024 | High-Al-composition AlGaN/GaN MISHEMT on Si with fT of 320 GHz
Hanghai Du, Lu Hao, Yachao Zhang 0002, Kui Dang, Zan Li 0001, Jincheng Zhang 0001, Yue Hao 0001 |
Sci. China Inf. Sci. | 2 |
| 2023 | Ice accretion thickness prediction using flash infrared thermal imaging and BP neural networksabstractAbstract The present study investigated ice accretion thickness under non‐incoming flow icing conditions on the ground using an infrared thermography system that converts infrared radiation temperature. Two back propagation (BP) neural network models were developed to measure ice thickness. Both theoretical model and polynomials were employed to fit the icing surface temperature elevation sequence to extract the pixel‐level temperature attenuation characteristics, which were served as the input to the BP neural networks. The prediction method of ice thickness by the BP neural network was analysed from three perspectives of sensitivity, dimension, and precision. In addition, K‐nearest neighbour (KNN) and support vector regression (SVR) algorithms were compared with BP neural network. In terms of prediction effect, the BP neural network performed the best. The verification of the BP neural network based on the characteristics of the theoretical model proved that the method can effectively predict the thickness of ice accretion, and its prediction error does not exceed 10%. Lu Hao, Weichen Pan, Rao Yao, Senyun Liu |
IET Image Process. | 1 |
| 2015 | Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application PortabilityabstractDespite significant advantages, wider usage of field-programmable gate arrays (FPGAs) has been limited by lengthy compilation and a lack of portability. Virtual-architecture overlays have partially addressed these problems, but previous work focuses mainly on heavily pipelined applications with minimal control requirements. We expand previous work by enabling more flexible control via overlay architectures for finite-state machines. Although not appropriate for control-intensive circuits, the presented architectures reduced compilation times of control changes in a convolution case study from 7 hours to less than 1 second, with no performance overhead and an area overhead of 0.2%. Patrick Cooke, Lu Hao, Greg Stitt |
ACM Trans. Embed. Comput. Syst. | 2 |
| 2013 | Virtual finite-state-machine architectures for fast compilation and portabilityabstractFPGA productivity suffers from lengthy compilation times and limited portability. To address these issues, previous work introduced virtual architecture overlays that enable application portability across FPGAs and place-androute that is orders-of-magnitude faster than device vendor tools. However, those previous approaches have limited applicability due to a focus on pipelines with few control requirements. In this paper, we expand control capabilities of previous work by introducing virtual control architectures for finite state machines. The presented architectures reduce lookup-table requirements by multiple orders-of-magnitude and enable larger finite state machines used in common benchmarks. Lu Hao, Greg Stitt |
ASAP | 1 |