Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Ujjwal Gupta

dblp:164/0841 · DBLP profile ↗
← Back
9ranked-venue papers
5as first author
0since 2021 · last 2020
0000-0002-6973-1720ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 5 first-authorSecurity and privacy · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Hardware security and side channels · 67% Privacy and data protection · 33%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Energy-efficient computing · 50% Performance modeling and evaluation · 38% Cloud and datacenter computing · 12%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
hardware performance counters
0.412020
COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity · IEEE Trans. Inf. Forensics Secur. 2020
Hardware security and side channels › hardware monitoring
hardware performance counter-based detection
0.412020
COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity · IEEE Trans. Inf. Forensics Secur. 2020
Privacy and data protection
privacy compliance
0.412020
COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity · IEEE Trans. Inf. Forensics Secur. 2020
Performance modeling and evaluation › processor performance modeling › accelerator performance modeling
GPU performance modeling
0.312018
An Online Learning Methodology for Performance Modeling of Graphics Processors · IEEE Trans. Computers 2018
Energy-efficient computing
power-performance modeling
0.312018
STAFF: online learning with stabilized adaptive forgetting factor and feature selection algorithm · DAC 2018
Energy-efficient computing › power management
dynamic power management
0.112018
An Online Learning Methodology for Performance Modeling of Graphics Processors · IEEE Trans. Computers 2018
Cloud and datacenter computing › resource management
dynamic resource management
0.112018
STAFF: online learning with stabilized adaptive forgetting factor and feature selection algorithm · DAC 2018

Methods — techniques the papers use, named apart from their topics

online learning · 0.7machine learning classifier · 0.4hardware performance counters · 0.4regression · 0.3online feature selection · 0.3adaptive forgetting factor · 0.3
YearPublicationVenuePosition
2020 COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity
abstract
User privacy is an extremely important concern for mobile applications. Recently, the Federal Trade Commission (FTC) has penalized multiple mobile application developers, such as TikTok and BabyBus for violating privacy regulations. Privacy concerns are more critical for children, who do not comprehend the risks associated with transmitting private information like geospatial location. The Children's Online Privacy Protection Act (COPPA) is an online privacy regulation platform to monitor data usage by mobile applications designed for children. Existing research on detecting whether an application complies with certain privacy regulations is performed either by analyzing the application binary or by dynamic monitoring of network at runtime. However, as explained in related work, both methods have their respective demerits. We propose COPPTCHA, a Hardware performance counter (HPC)-based technique to detect whether a children's app abides by the COPPA regulations. HPCs are special purpose registers found in all processors that measure system level events. Since the proposed method is hardware-based, it is difficult to undermine it compared to software-based COPPA compliance detection. COPPTCHA has no hardware overhead, since HPC data collection is integral to all industry standard processors. The HPC readings of applications running on a smartphone are classified using machine learning based classifiers to detect COPPA compliance. Our experiments employing a Moto-G4 smartphone shows that COPPTCHA can detect COPPA-violating apps with ≥ 99% accuracy.
Kanad Basu, Suha Sabi Hussain, Ujjwal Gupta, Ramesh Karri
IEEE Trans. Inf. Forensics Secur.3
2018 STAFF: online learning with stabilized adaptive forgetting factor and feature selection algorithm
abstract
Dynamic resource management techniques rely on power consumption and performance models to optimize the operating frequency and utilization of processing elements, such as CPU and GPU. Despite the importance of these decisions, many existing approaches rely on fixed power and performance models that are learned offline. However, offline models cannot guarantee accuracy when workloads differ significantly from the training available at design time. This paper presents an online learning framework (STAFF) that constructs adaptive run-time models for stationary and non-stationary workloads. STAFF is the first framework that (1) guarantees stability while quickly adapting to workload changes, (2) performs online feature selection with linear complexity, and (3) adapts to new model coefficients by employing adaptively varying forgetting factor, all at the same time. Experiments on an Intel® Coreh™ i5 6th generation platform demonstrate up to 6× improvement in the performance prediction accuracy compared to existing techniques.
Ujjwal Gupta, Manoj Babu, Raid Ayoub, Michael Kishinevsky, Francesco Paterna, Ümit Y. Ogras
DAC1
2018 Online learning for adaptive optimization of heterogeneous SoCs
abstract
Energy efficiency and performance of heterogeneous multiprocessor systems-on-chip (SoC) depend critically on utilizing a diverse set of processing elements and managing their power states dynamically. Dynamic resource management techniques typically rely on power consumption and performance models to assess the impact of dynamic decisions. Despite the importance of these decisions, many existing approaches rely on fixed power and performance models learned offline. This paper presents an online learning framework to construct adaptive analytical models. We illustrate this framework for modeling GPU frame processing time, GPU power consumption and SoC power-temperature dynamics. Experiments on Intel Atom E3826, Qualcomm Snapdragon 810, and Samsung Exynos 5422 SoCs demonstrate that the proposed approach achieves less than 6% error under dynamically varying workloads.
Ganapati Bhat, Sumit K. Mandal, Ujjwal Gupta, Ümit Y. Ogras
ICCAD3
2018 An Online Learning Methodology for Performance Modeling of Graphics Processors
abstract
Approximately 18 percent of the 3.2 million smartphone applications rely on integrated graphics processing units (GPUs) to achieve competitive performance. Graphics performance, typically measured in frames per second, is a strong function of the GPU frequency, which in turn has a significant impact on mobile processor power consumption. Consequently, dynamic power management algorithms have to assess the performance sensitivity to the frequency accurately to choose the operating frequency of the GPU effectively. Since the impact of GPU frequency on performance varies rapidly over time, there is a need for online performance models that can adapt to varying workloads. This paper presents a light-weight adaptive runtime performance model that predicts the frame processing time of graphics workloads at runtime without apriori characterization. We employ this model to estimate the frame time sensitivity to the GPU frequency, i.e., the partial derivative of the frame time with respect to the GPU frequency. The proposed model does not rely on any parameter learned offline. Our experiments on commercial platforms with common GPU benchmarks show that the mean absolute percentage error in frame time and frame time sensitivity prediction are 4.2 and 6.7 percent, respectively.
Ujjwal Gupta, Manoj Babu, Raid Ayoub, Michael Kishinevsky, Francesco Paterna, Suat Gumussoy, Ümit Y. Ogras
IEEE Trans. Computers1
2017 DyPO: Dynamic Pareto-Optimal Configuration Selection for Heterogeneous MpSoCs
abstract
Modern multiprocessor systems-on-chip (MpSoCs) offer tremendous power and performance optimization opportunities by tuning thousands of potential voltage, frequency and core configurations. As the workload phases change at runtime, different configurations may become optimal with respect to power, performance or other metrics. Identifying the optimal configuration at runtime is infeasible due to the large number of workloads and configurations. This paper proposes a novel methodology that can find the Pareto-optimal configurations at runtime as a function of the workload. To achieve this, we perform an extensive offline characterization to find classifiers that map performance counters to optimal configurations. Then, we use these classifiers and performance counters at runtime to choose Pareto-optimal configurations. We evaluate the proposed methodology by maximizing the performance per watt for 18 single- and multi-threaded applications. Our experiments demonstrate an average increase of 93%, 81% and 6% in performance per watt compared to the interactive, ondemand and powersave governors, respectively.
Ujjwal Gupta, Chetan Arvind Patil, Ganapati Bhat, Prabhat Mishra 0001, Ümit Y. Ogras
ACM Trans. Embed. Comput. Syst.1
2016 Multi-objective design optimization for flexible hybrid electronics
abstract
Flexible systems that can conform to any shape are desirable for wearable applications. Over the past decade, there have been tremendous advances in the domain of flexible electronics which enabled printing of devices, such as sensors on a flexible substrate. Despite these advances, pure flexible electronics systems are limited by poor performance and large feature sizes. Flexible hybrid electronics (FHE) is an emerging technology which addresses these issues by integrating high performance rigid integrated circuits and flexible devices. Yet, there are no system-level design flows and algorithms for the design of FHE systems. To this end, this paper presents a multi-objective design algorithm to implement a target application optimally using a library of rigid and flexible components. Our algorithm produces a set of Pareto frontiers that optimize the physical flexibility, energy per operation and area metrics. Simulation studies show a 32× range in area and 4× range in flexibility across the set of Pareto-optimal design points.
Ganapati Bhat, Ujjwal Gupta, Jaehyun Park 0005, Sule Ozev, Ümit Y. Ogras
ICCAD2
2016 Adaptive performance prediction for integrated GPUs
abstract
Integrated GPUs have become an indispensable component of mobile processors due to the increasing popularity of graphics applications. The GPU frequency is a key factor both in application throughput and mobile processor power consumption under graphics workloads. Therefore, dynamic power management algorithms have to assess the performance sensitivity to the GPU frequency accurately. Since the impact of the GPU frequency on performance varies rapidly over time, there is a need for online performance models that can adapt to varying workloads. This paper presents a light-weight adaptive runtime performance model that predicts the frame processing time. We use this model to estimate the frame time sensitivity to the GPU frequency. Our experiments on a mobile platform running common GPU benchmarks show that the mean absolute percentage error in frame time and frame time sensitivity prediction are 3.8% and 3.9%, respectively.
Ujjwal Gupta, Joseph Campbell, Ümit Y. Ogras, Raid Ayoub, Michael Kishinevsky, Francesco Paterna, Suat Gumussoy
ICCAD1
2016 Extending networks from chips to flexible and stretchable electronics
abstract
Emerging flexible hybrid electronics paradigm integrates traditional rigid integrated circuits and printed electronics on a flexible substrate. This hybrid approach aims to combine the physical benefits of flexible electronics with the computational advantages of the silicon technology. In this paper, we discuss the possibility to implement a physically flexible system capable of sensing, computation and communication. We argue that this capability can transform personalized computing by enabling the next big leap forward in the form factor design, similar to the shift from desktop and laptop computers to hand-held devices. Designing this type of a comprehensive system requires integrating many flexible and rigid resources on the same substrate. As a result, efficient interconnection network design rises as one of the major challenges similar to the system-on-chip experience. Therefore, we also discuss the interconnect design challenges and promising solutions for flexible hybrid systems.
Ujjwal Gupta, Ümit Y. Ogras
NOCS1
2015 Robust Communication with IoT Devices using Wearable Brain Machine Interfaces
abstract
Proliferation of internet-of-things (IoT) will lead to scenarios where humans will interact with and control a variety of networked devices including sensors and actuators. Wearable brain-machine interfaces (BMI) can be a key enabler of this interaction for people with disabilities and limited motor skills. At the same time, BMI can improve the experience of healthy individuals significantly. However, state-of-the-art BMI systems have limited applicability as they are prone to errors even with sophisticated machine learning algorithms used for classifying the electroencephalogram (EEG) signals. We improve the reliability of BMI communication significantly by proposing two techniques at higher abstraction layers. Our first contribution is a command confirmation protocol that protects the brain-machine communication against false interpretations at run time. The second contribution is an off-line optimal event selection algorithm that identifies the most reliable subset of events supported by the target BMI system. The event selection is guided by novel user specific reliability metrics defined for the first time in this paper. Extensive experiments using a commercial BMI system demonstrate that the proposed techniques increase the communication robustness significantly, and reduce the time to complete a complex navigation task by 63% on average.
Md Muztoba, Ujjwal Gupta, Tanvir Mustofa, Ümit Y. Ogras
ICCAD2