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R. C. Martin

dblp:178/6067 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1970
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 77% Integrated circuit design · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › signal integrity
transmission line termination
0.011970
Interconnection of High-Speed Logic Circuits · IEEE Trans. Computers 1970
Integrated circuit design › digital circuit design
high-speed digital circuits
0.011970
Interconnection of High-Speed Logic Circuits · IEEE Trans. Computers 1970

Methods — techniques the papers use, named apart from their topics

time-domain analysis · 0.0frequency domain analysis · 0.0
YearPublicationVenuePosition
1970 Interconnection of High-Speed Logic Circuits
abstract
The design of present-day logic systems, using circuits with transition times approaching 1 ns, meets with problems unless the transmission lines are properly terminated. It is very inconvenient to match the input and output of a logic circuit to the characteristic impedance of a transmission line, even at the cost of considerable distortion. An alternative method is to use lines of less than 5-cm length to reduce the distortion. However, many applications require longer lines, and some applications also require interconnecting logic circuits at various points along the line. This short note considers a method of dealing with this multiple problem using frequency domain, time domain, and experimental analysis.
T. Janisz, R. C. Martin
IEEE Trans. Computers2