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Eitan Federovsky

dblp:18/1009 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 77% Performance modeling and evaluation · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
branch prediction
0.011998
Branch Prediction Based on Universal Data Compression Algorithms · ISCA 1998
Performance modeling and evaluation › benchmarking › benchmark suite
SPEC benchmarks
0.011998
Branch Prediction Based on Universal Data Compression Algorithms · ISCA 1998

Methods — techniques the papers use, named apart from their topics

prediction by partial matching · 0.0context tree weighting · 0.0adaptive algorithm · 0.0
YearPublicationVenuePosition
1998 Branch Prediction Based on Universal Data Compression Algorithms
abstract
Data compression and prediction are closely related. Thus prediction methods based on data compression algorithms have been suggested for the branch prediction problem. In this work we consider two universal compression algorithms: prediction by partial matching (PPM), and a recently developed method, context tree weighting (CTW). We describe the prediction algorithms induced by these methods. We also suggest adaptive algorithms variations of the basic methods that attempt to fit limited memory constraints and to match the non-stationary nature of the branch sequence. Furthermore, we show how to incorporate address information and to combine other relevant data. Finally, we present simulation results for selected programs from the SPECint95, SYSmark/32, SYSmark/NT, and transactional processing benchmarks. Our results are most promising in programs with difficult to predict branch behavior.
Eitan Federovsky, Meir Feder, Shlomo Weiss
ISCA1