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Joseph Otterman

dblp:180/6295 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1964
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 56% Performance modeling and evaluation · 44%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › simulation › analog and hybrid computer simulation
analog computer simulation		 0.011958
On the Loop- and Node-Analysis Approaches to the Simulation of Electrical Networks · IRE Trans. Electron. Comput. 1958
Electronic design automation
circuit simulation		 0.011958
On the Loop- and Node-Analysis Approaches to the Simulation of Electrical Networks · IRE Trans. Electron. Comput. 1958
Electronic design automation
circuit analysis		 0.011958
On the Loop- and Node-Analysis Approaches to the Simulation of Electrical Networks · IRE Trans. Electron. Comput. 1958

Methods — techniques the papers use, named apart from their topics

node analysis · 0.0loop analysis · 0.0
YearPublicationVenuePosition
1964 Comment on "A Fundamental Error Theory for Analog Computers
Joseph Otterman
 IEEE Trans. Electron. Comput.1
1958 On the Loop- and Node-Analysis Approaches to the Simulation of Electrical Networks
abstract
The number of integrators in an analog-computer setup should be equal to the order of the differential equation describing the system. This paper presents a new procedure for tracing the loop currents which results in one-to-one correspondence between the number of integrators in the stimulation setup and the count of independent energy-storing elements in the network, i.e., the degree of the system's characteristic equation. The generality of the procedure proves that it is always possible to trace the loop currents in such a way that excess integrators are avoided. The loop-analysis and the branch-variables-analysis approaches are discussed and examples given.
Joseph Otterman
 IRE Trans. Electron. Comput.1