YongKang Liu, Jiayang Yu, Mingyang Wang, Yiqun Zhang, Ercong Nie, Shi Feng, Daling Wang, Kaisong Song, Hinrich Schuetze. Proceedings of the 64th Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers). 2026.

Jiayang Yu, Yihang Zhang, Bin Wang, Peiqin Lin, YongKang Liu, Shi Feng. Proceedings of the 2025 Conference of the Nations of the Americas Chapter of the Association for Computational Linguistics: Human Language Technologies (Volume 1: Long Papers). 2025.

Graph-based Retrieval-Augmented Generation (GraphRAG) has emerged as a promising paradigm for enhancing LLM reliability by enabling multi-hop reasoning over graph-structured knowledge. However, existing LLMs struggle to efficiently process graph-structured inputs, as traditional attention mechanisms are sequence-based and introduce significant redundancy when serializing graphs into prompt sequences, leading to excessive computation and memory overhead. To address this, we introduce dependency attention, a novel graph-aware attention mechanism that restricts attention computation to token pairs with structural dependencies in the retrieved subgraph. Unlike standard self-attention that computes fully connected interactions, dependency attention prunes irrelevant token pairs and reuses computations along shared relational paths, substantially reducing inference overhead. Building on this idea, we develop DepCache, a KV cache management framework tailored for dependency attention. DepCache enables efficient KV cache reuse through (i) a graph-based KV cache reuse strategy that aligns KV caches across varying prompt contexts, enabling efficient cross-request reuse in GraphRAG, and (ii) a locality-aware replacement policy that leverages spatial and temporal access patterns to improve KV cache hit rate. Evaluations across diverse models and datasets show that DepCache improves LLM inference throughput by 1.5×-5.0× and reduces time-to-first-token latency by up to 3.2×, without compromising generation accuracy.

This paper presents a monolithically integrated E-band amplifier multiplier chain (AMC) developed in 130 nm SiGe BiCMOS process. This E-band AMC is composed of a 25 GHz 1:1 power divider, two 25 GHz driver amplifiers (DA1,2), a 75 GHz passive frequency tripler, and a 75 GHz power amplifier (PA). By applying a bypass tuning capacitor based power enhancing technique in the single-ended DA and PA, the output power and power-added-efficiency (PAE) of the AMC have been effectively improved. Benefiting from the proposed passive tripler core with second harmonic suppression function, and the impedance matching network with frequency selection characteristics, the AMC presents better harmonic suppression performance compared with the conventional topology. The bias circuits with temperature compensation are applied to the DA and PA to ensure the performance of the AMC when the temperature changes. The AMC has a measured output power exceeding 0 dBm in the entire E-band frequency range with a peak output power of 10.9 dBm at 77 GHz, and exhibits a record PAE of 8.25 %. Within the 3 dB operating frequency range from 69 to 87 GHz, the rejection of fundamental and second harmonics are better than 33.5 dB. The AMC can work properly between −40°C and 125 °C with the proposed temperature compensation bias circuits.

Dynamic construction of optimal portfolio is investigated. Multiple assets are allocated and rebalanced periodically based on different principles. We develop several dynamic allocation strategies to maximize long-term portfolio value based on Kelly's approach related to mutual information. We show that the resulting asset allocation strategy outperforms the traditional approaches and produces an excellent trade-off between risk and return. Out of sample simulation results are also provided to demonstrate the performance.