This paper evaluates the buffer requirements resulting from rate mismatch in a 32/spl times/32 ATM switch with sixty OC-3 (155 Mbps) and four T-1 (1.5 Mbps) ports. Rate mismatch is expected to be a common occurrence in ATM wide area networks, particularly at the network seams. Without proper dimensioning, the switch buffers can rapidly overflow as a result of high-speed input traffic destined to a low-speed port. We specifically consider the Cisco Systems LightStream 1010 ATM switch architecture in our analysis, and compare the design options of a larger common shared buffer with that of adding buffers to each T-1 output port. We consider traffic from individual high-speed servers, LAN workstations, and aggregated Ethernet traffic.

This paper proposes a novel approach for adaptive flow classification for flow-based hybrid switching systems to match the time varying traffic/resource characteristics. It minimizes the maximum of the system resource utilizations associated with packet processing power, signalling capacity and routing table size. After formulating the proposed flow adaptation as a min-max stochastic control problem, a heuristic algorithm is developed. The simulation study based on real traces shows the viability of the proposed flow adaptation for dynamic resource management in hybrid switching system design. The algorithm is simple to implement and only requires the adaptation of two global variables at time intervals of every few seconds based on the present usage of resources.

This paper evaluates the additional buffer requirements of an ATM shared-memory switch using packet-level (store-and-forward) rather than cell-level (cut-through) service scheduling. Packet-level scheduling is important to tag and IP switching for multipoint-to-one services; it allows different connections to be merged into a single virtual connection to reduce routing complexity. Cisco Systems will incorporate packet-level scheduling in their LightStream 1010 ATM switch using a feature upgrade card possessing per flow queueing; we thus specifically consider the LightStream 1010 architecture in our analysis.

This paper addresses a fundamental problem in resource management for flow-based hybrid switching systems. Such systems aim at efficient transport of layer-3 connectionless IP traffic over layer-2 connection-oriented ATM switching fabrics. One idea behind flow-based hybrid switching is to decompose individual IP packet streams into flows and then to classify them into short-lived and long-lived flows. While the short-lived flows are good for forwarding by the embedded software through permanent virtual connections (PVCs), the long-lived flows are more effectively transmitted by hardware through switched virtual connections (SVCs). Clearly the flow identification/classification mechanism will have great impact on the utilization of the system's resources. Our paper focuses on the resources which are directly associated with packet processing power, signaling capacity, and flow cache table size. Our study indicates that the presently available static flow classification methods have a vital shortcoming in balancing the utilization of the system's resources. We propose a novel approach for adaptive flow classification based on the min-max objective for the system resource utilizations to match with the time-varying traffic/resource characteristics based on the monotone properties and sensitivity analysis of the resource utilizations as functions of the control parameters, we first prove that the optimal solution of the static min-max problem is achieved at a unique balance point for the resource utilizations. With the intuition gained from the static results, we then design an adaptive controller formulated as a hierarchical stochastic automata control system with local search. The optimality of the proposed adaptive controller is tested against the static optimal control based on real trace simulations. The simulation studies in highly nonstationary environments show the viability of the proposed flow adaptation for dynamic resource management in hybrid switching system design. The algorithm is simple to implement and only requires the adaptation of two global variables at time intervals of every few seconds based on the present usage of resources.

This paper uses measurement-based traffic models to evaluate a shared-memory ATM switch with 32/spl times/32 155 Mbit/s ports and an external multicasting engine; this is the design of Cisco System's next-generation ATM switch, the LightStream-1010 (LS-1010). Assuming that the multicast traffic can take approximately 30% of the total switch load, we find that an external multicasting engine requires a 32 (8) cell buffer at a replication rate of 16 (64) cells per cell service time. We discover that in a multimedia environment, the shared-memory architecture requires 10-30 times less total memory than the bus architecture; a 64 K cell buffer is sufficient to handle 90% utilization with the nonuniform traffic that we investigated. Multiple-priority classes are considered.

A routing architecture applying the concept of multichannel transmission groups (MCTGs) for ATM systems is proposed. A queuing analysis of an internally nonblocking ATM switch employing this MCTG concept with partially shared output buffers is presented. The analysis is based on the discrete-time D/sup /A///D/c/B queuing model. Both bulk input traffic bulk-size distribution (A) and deterministic traffic (D/sub 1/+. . .+D/sub N/) are considered. The impact of switch speedup on the performance is also taken into account. It is shown that the MCTG architecture yields better performance in terms of delay and cell loss probability than its single channel counterpart. It is also found that the switch speedup required to closely approximate the optimal performance obtained by having the switch fabric run N times as fast as the input and output channels, where N is the size of the switch, is rather small compared to N. This makes the practical realization of the proposed switch architecture feasible.>

The problem of furnishing an asynchronous transfer mode (ATM) based broadband-ISDN (B-ISDN) with two bearer services supporting different grades of transfer quality is addressed. The focus is on priority bandwidth and buffer management in the ATM communications nodes (switches, multiplexers or concentrators, and expanders) in the context of a multichannel network architecture. Detailed queueing analyses and simulations and results are provided to evaluate the differentiation between traffic classes that can be achieved by different strategies. The implementation complexity of the different schemes is discussed. Various priority queueing strategies characterized mainly by different degrees of resource sharing and a general system model for performance evaluation are introduced. Performance comparisons and design tradeoffs are addressed.>

The architecture and performance of fixed-node virtual channel (VC) routing in asynchronous transfer mode (ATM) networks is studied. In fixed-node routing, only the nodes are specified, and any of the available parallel links between nodes may be used. Applying the fixed-node routing architecture in ATM networks has the advantages of more efficient use of network resources, better availability/reliability and performance, and the ability to support superrate services. The sequencing problem associated with this approach in conventional packet-switched networks can be easily solved in the ATM environment. An analysis is presented of the performance of this routing architecture for an internally nonblocking ATM switch with partially shared output buffers based on a discrete-time D/sup (A)//D/c/B queuing system for general input traffic. A D/sub 1/+ . . . +D/sub N//D/c/B queuing system is used for deterministic traffic. It is shown that the fixed-node routing architecture yields better performance in terms of delay, loss probability, channel utilization, and switch throughput than its fixed-path counterpart.>

The discrete-time D[A]/D/c/B queueing system is studied. We consider both a bulk arrival process with constant bulk inter-arrival time (D) and general bulk-size distribution (A) and a periodic arrival process (D1 + ··· + DN). The service/transmission times are deterministic (D) and the system provides for a maximum of c servers with a buffer size B. The motivation for studying this queueing system is its application in performance modeling and analysis of an asynchronous transfer mode (ATM) switch with multichannel transmission groups.