We propose a method to solve problems that accompany recovering from operating system (OS) failures. First, to reduce recovery time, we make two OSes run simultaneously and configure them as an active-backup structure in one computer. This structure can provide a fast recovery from failures by a failover. Recovery time when using the proposed method is about 0.4 seconds at a minimum and up to about 10 seconds even if 2 GB memory is restored. Next, for smooth continuation of services after recovery, the proposed method preserves processes, their network connections, and file caches, and does not have runtime overhead to obtain a process execution status from the running active OS before a crash. In addition, the resources consumed to build the active-backup structure are only one CPU core and a small amount of memory. The hardware required to implement the proposed method is a multi-core processor and one disk for each OS, consequently, introduction of the proposed method incurs low cost. In the evaluation, we confirmed that the downtime was up to about 1.5 seconds when the active OS of the proposed system crashed while running a text editor, an NFS server, and a database server.

The VCore [1](*) based design methodology, which has been developed at the VCDS (**) Project, is a SoC design methodology using VCores. A VCore is a reusable, high level abstracted design component. We have developed the VCore based design methodology and the VCDS tool prototype. We used the developed tool and did a trial SoC design. The design result showed that SoC design productivity improved using the proposed methodology.

This paper describes a resistance calculation program for a layout verification system called EMAP. A new resistance calculation algorithm, based on the finite-element method, and a generalized resistor model, used in this program, are discussed. Contact resistance effects, pinch resistors, and other kinds of resistance appearing in LSI's are considered in the proposed model. The proposed two-dimensional model, in which an inherent three-dimensional structure of resistors is embedded, allows efficient and accurate resistance calculation. The resistance value for an arbitrarily shaped multiregional resistivity and multiport resistor can be calculated efficiently by the proposed algorithm. The algorithm, called direct admittance matrix derivation, makes it possible to eliminate the tedious boundary condition treatment, and provides efficient matrix manipulation. Implementation techniques and related algorithms are discussed; these include resistor recognition from mask artwork, mesh generation for finite elements, node numbering for matrix bandwidth reduction, some properties of matrices appearing in the proposed algorithm, and a circuit representation method for the derived matrices. Some implementation results are also discussed.

A new LSI artwork analysis and processing system, called EMAP, is described with algorithms, a database schema and applications. EMAP provides the designer with the artwork verification and processing tools which include mask artwork processing, geometrical design rule checking, connectivity analysis and electrical circuit parameter calculation. The circuit connectivity data derived from the mask artwork data is used for input to a logic simulator, a timing simulator, a circuit simulator and a circuit schematic generator.