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Jan Mühlig

dblp:222/6290 · DBLP profile ↗
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6ranked-venue papers
2as first author
5since 2021 · last 2025
0009-0008-2226-6367ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Databases, data management, data science and information retrieval · 6 · 2 first-author · 5 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 61% Memory systems · 39%
Databases, data mining, and information retrieval
1 paper
Query processing and optimization · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Query processing and optimization
query compilation
0.612022
Low-latency query compilation · VLDB J. 2022
Compilers and program optimization
intermediate representation
0.612022
Low-latency query compilation · VLDB J. 2022
Parallel and multicore computing › concurrent data structures
lock-free data structures
0.512021
MxTasks: How to Make Efficient Synchronization and Prefetching Easy · SIGMOD Conference 2021
Memory systems › cache
prefetching
0.512021
MxTasks: How to Make Efficient Synchronization and Prefetching Easy · SIGMOD Conference 2021
Parallel and multicore computing
synchronization
0.512021
MxTasks: How to Make Efficient Synchronization and Prefetching Easy · SIGMOD Conference 2021
Memory systems
cache coherence
0.112021
MxTasks: How to Make Efficient Synchronization and Prefetching Easy · SIGMOD Conference 2021

Methods — techniques the papers use, named apart from their topics

ReSQL · 1.1LLVM · 1.1Flounder IR · 1.1
YearPublicationVenuePosition
2025 Breaking the Cycle - A Short Overview of Memory-Access Sampling Differences on Modern x86 CPUs
abstract
As hardware complexity increases, profiling becomes essential for understanding system behavior.This paper compares different x86 sampling implementations for memory access profiling, revealing their complementary capabilities and limitations.Plus, we demonstrate that current abstractions like the perf subsystem inadequately expose platform-specific features.
Roland Kühn, Jan Mühlig, Jens Teubner
DaMoN2
2024 How to Be Fast and Not Furious: Looking Under the Hood of CPU Cache Prefetching
abstract
Software-based prefetching is a powerful method for tolerating access penalties that are encountered by data processing systems: memory latency. Although the idea appears straightforward---simply informing the CPU about upcoming data accesses---the intricacies of its implementation remain insufficiently understood. Existing works demonstrate how to rewrite algorithms for prefetching, yet they often overlook the limitations and hardware implications of bringing data into the cache hierarchy. In this paper, we examine software-based prefetching thoroughly by delving into its implementation and identifying pitfalls across various platforms. Furthermore, we provide actionable insights and recommendations for developers seeking to boost their applications through this technique.
Roland Kühn, Jan Mühlig, Jens Teubner
DaMoN2
2023 Micro Partitioning: Friendly to the Hardware and the Developer
abstract
Modern hardware’s complexity has made studying hardware-conscious algorithms a relevant topic for many years. Partitioning algorithms, for instance, break data into bits that fit into fast CPU caches. Unfortunately, they are often challenging to design, develop, and maintain. While hardware-oblivious algorithms are easier to build, they may perform poorly when hardware or data deviate from expectations.
Jan Mühlig, Jens Teubner
DaMoN1
2022 Low-latency query compilation
abstract
Abstract Query compilation is a processing technique that achieves very high processing speeds but has the disadvantage of introducing additional compilation latencies. These latencies cause an overhead that is relatively high for short-running and high-complexity queries. In this work, we present Flounder IR and ReSQL, our new approach to query compilation. Instead of using a general purpose intermediate representation (e.g., LLVM IR) during compilation, ReSQL uses Flounder IR, which is specifically designed for database processing. Flounder IR is lightweight and close to machine assembly. This simplifies the translation from IR to machine code, which otherwise is a costly translation step. Despite simple translation, compiled queries still benefit from the high processing speeds of the query compilation technique. We analyze the performance of our approach with micro-benchmarks and with ReSQL, which employs a full translation stack from SQL to machine code. We show reductions in compilation times up to two orders of magnitude over LLVM and show improvements in overall execution time for TPC-H queries up to 5.5 $$\times $$ × over state-of-the-art systems.
Henning Funke, Jan Mühlig, Jens Teubner
VLDB J.2
2021 MxTasks: How to Make Efficient Synchronization and Prefetching Easy
abstract
The hardware environment has changed rapidly in recent years: Many cores, multiple sockets, and large amounts of main memory have become a commodity. To benefit from these highly parallel systems, the software has to be adapted. Sophisticated latch-free data structures and algorithms are often meant to address the situation. But they are cumbersome to develop and may still not provide the desired scalability.
Jan Mühlig, Jens Teubner
SIGMOD Conference1
2020 Efficient generation of machine code for query compilers
abstract
Query compilation can make query execution extremely efficient, but it introduces additional compilation time. The compilation time causes a relatively high overhead especially for short-running and high-complexity queries.
Henning Funke, Jan Mühlig, Jens Teubner
DaMoN2