Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Benoit Pit-Claudel

dblp:229/8754 · DBLP profile ↗
← Back
1ranked-venue papers
1as first author
0since 2021 · last 2018
0000-0003-3406-5817ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Software-defined and programmable networks · 44% Datacenter networks · 44% Internet architecture and protocols · 13%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Cloud and datacenter computing · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Software-defined and programmable networks
programmable data plane
0.312018
Stateless Load-Aware Load Balancing in P4 · ICNP 2018
Datacenter networks › load balancing
stateless load balancing
0.312018
Stateless Load-Aware Load Balancing in P4 · ICNP 2018
Cloud and datacenter computing
cluster resource management and scheduling
0.312018
Stateless Load-Aware Load Balancing in P4 · ICNP 2018
Internet architecture and protocols › IPv6
IPv6 segment routing
0.112018
Stateless Load-Aware Load Balancing in P4 · ICNP 2018

Methods — techniques the papers use, named apart from their topics

power-of-choices · 0.7covert channel · 0.7consistent hashing · 0.7
YearPublicationVenuePosition
2018 Stateless Load-Aware Load Balancing in P4
abstract
Leveraging the performance opportunities offered by programmable hardware, stateless load-balancing architectures allowing line-rate processing are appealing. Moreover, it has been demonstrated that significantly fairer load-balancing can be achieved by an architecture that considers the actual load of application instances when dispatching connection requests. Architectures which maintain per-connection state for resiliency and/or track application load state for fairness are, however, at odds with hardware-imposed memory constraints. Thus, a desirable load-balancer for programmable hardware would be both stateless and able to dispatch queries to application instances according to their current load. This paper presents SHELL, a stateless application-aware load-balancer combining (i) a power-of-choices scheme using IPv6 Segment Routing to dispatch new flows to a suitable application instance from among multiple candidates, and (ii) the use of a covert channel to record/report which flow was assigned to which candidate in a stateless fashion. In addition, consistent hashing versioning is used to ensure that connections are maintained to the correct application instance, using Segment Routing to "browse" through the history when needed. The stateless design of SHELL makes it suitable for hardware implementation, and this paper describes the implementation of a P4-NetFPGA prototype. A performance evaluation of this SHELL implementation demonstrates throughput and latency characteristics comparable to other stateless load-balancing implementations, while enabling application instance-load-aware dispatching and significantly increasing per-connection consistency resiliency.
Benoit Pit-Claudel, Yoann Desmouceaux, Pierre Pfister, W. Mark Townsley, Thomas H. Clausen
ICNP1