Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Jinbum Park

dblp:231/1918 · DBLP profile ↗
← Back
6ranked-venue papers
0as first author
4since 2021 · last 2025
0009-0005-2974-4905ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 4 · 3 since 2021Systems, architecture and hardware · 1 · 1 since 2021Computer networks · 1Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
5 papers
Systems and software security · 74% Hardware security and side channels · 26%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 75% Memory systems · 25%
Software engineering, system software, and programming languages
2 papers
Operating systems · 57% Program analysis · 43%

Topics — the 16 heaviest of 16, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Systems and software security
operating system security
1.322024
PeTAL: Ensuring Access Control Integrity against Data-only Attacks on Linux · CCS 2024
In-Kernel Control-Flow Integrity on Commodity OSes using ARM Pointer Authentication · USENIX Security Symposium 2022
Systems and software security › memory safety
memory corruption
1.022025
PeTAL: Ensuring Access Control Integrity against Data-only Attacks on Linux · CCS 2024
Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution · SP 2025
Systems and software security › memory safety › hardware-enforced memory safety
memory tagging
0.912025
Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution · SP 2025
Hardware security and side channels
side-channel attack
0.912025
Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution · SP 2025
Hardware security and side channels › microarchitectural attacks › transient execution attack
speculative execution attack
0.912025
Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution · SP 2025
Systems and software security › memory safety
control-flow integrity
0.612022
In-Kernel Control-Flow Integrity on Commodity OSes using ARM Pointer Authentication · USENIX Security Symposium 2022
Systems and software security
exploitation
0.612022
ViK: practical mitigation of temporal memory safety violations through object ID inspection · ASPLOS 2022
Systems and software security › memory safety › control-flow integrity
kernel control-flow integrity
0.612022
In-Kernel Control-Flow Integrity on Commodity OSes using ARM Pointer Authentication · USENIX Security Symposium 2022
Systems and software security
memory safety
0.612022
ViK: practical mitigation of temporal memory safety violations through object ID inspection · ASPLOS 2022
Systems and software security › memory safety
temporal memory safety
0.612022
ViK: practical mitigation of temporal memory safety violations through object ID inspection · ASPLOS 2022
Hardware security and side channels › side-channel attack
cache side-channel attacks
0.412020
SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture · MobiSys 2020
Processor architecture and microarchitecture
speculative execution
0.312025
Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution · SP 2025
Operating systems › system security › operating system security
linux kernel security
0.212024
PeTAL: Ensuring Access Control Integrity against Data-only Attacks on Linux · CCS 2024
Program analysis
dynamic analysis
0.212022
ViK: practical mitigation of temporal memory safety violations through object ID inspection · ASPLOS 2022
Memory systems
cache design
0.112020
SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture · MobiSys 2020
Processor architecture and microarchitecture › microarchitectural security
microarchitectural side channels
0.112020
SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture · MobiSys 2020

Methods — techniques the papers use, named apart from their topics

speculative execution · 1.7side-channel analysis · 1.7access control integrity enforcement · 1.5object ID inspection · 1.1smokebomb mitigation · 0.9ARM pointer authentication · 0.6
YearPublicationVenuePosition
2025 Tiktag: Breaking ARM's Memory Tagging Extension with Speculative Execution
abstract
ARM Memory Tagging Extension (MTE) is a new hardware feature introduced in ARMv8.5-A architecture, aiming to detect memory corruption vulnerabilities. The low overhead of MTE makes it an attractive solution to mitigate memory corruption attacks in modern software systems and is considered the most promising path forward for improving C/C++ software security. This paper explores the potential security risks posed by speculative execution attacks against MTE. Specifically, this paper identifies new Tiktag gadgets capable of leaking the MTE tags from arbitrary memory addresses through speculative execution. With Tiktag gadgets, attackers can bypass the probabilistic defense of MTE, increasing the attack success rate by close to 100%. We demonstrate that Tiktag gadgets can be used to bypass MTE-based mitigations in real-world systems, Google Chrome and the Linux kernel. Experimental results show that Tiktag gadgets can successfully leak an MTE tag with a success rate higher than 95% in less than 4 seconds. We further propose new defense mechanisms to mitigate the security risks posed by Tiktag gadgets.
Juhee Kim, Jinbum Park, Sihyeon Roh, Taesoo Kim, Byoungyoung Lee
SP2
2024 PeTAL: Ensuring Access Control Integrity against Data-only Attacks on Linux
abstract
Data-only attacks are emerging as a new threat to the security of modern operating systems. As a typical data-only attack, memory corruption attacks can compromise the integrity of kernel data, which effectively breaks the premises of access control systems. Unfortunately, the prevalence of memory corruption vulnerabilities allows attackers to exploit them and bypass access control mechanisms. Given the arbitrary memory access capability, attackers can overwrite access control policies or illegally access the kernel resources protected by the access control systems.
Juhee Kim, Jinbum Park, Yoochan Lee, Chengyu Song, Taesoo Kim, Byoungyoung Lee
CCS2
2022 ViK: practical mitigation of temporal memory safety violations through object ID inspection
abstract
Temporal memory safety violations, such as use-after-free (UAF) vulnerabilities, are a critical security issue for software written in memory-unsafe languages such as C and C++.
Haehyun Cho, Jinbum Park, Adam Oest, Tiffany Bao, Ruoyu Wang 0001, Yan Shoshitaishvili, Adam Doupé, Gail-Joon Ahn
ASPLOS2
2022 In-Kernel Control-Flow Integrity on Commodity OSes using ARM Pointer Authentication
Sungbae Yoo, Jinbum Park, Seolheui Kim, Yeji Kim, Taesoo Kim
USENIX Security Symposium2
2020 SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture
abstract
Cache side-channel attacks abuse microarchitectural designs meant to optimize memory access to infer information about victim processes, threatening data privacy and security. Recently, the ARM architecture has come into the spotlight of cache side-channel attacks with its unprecedented growth in the market.
Haehyun Cho, Jinbum Park, Donguk Kim 0003, Ziming Zhao 0001, Yan Shoshitaishvili, Adam Doupé, Gail-Joon Ahn
MobiSys2
2018 Prime+Count: Novel Cross-world Covert Channels on ARM TrustZone
abstract
The security of ARM TrustZone relies on the idea of splitting system-on-chip hardware and software into two worlds, namely normal world and secure world. In this paper, we report cross-world covert channels, which exploit the world-shared cache in the TrustZone architecture. We design a Prime+Count technique that only cares about how many cache sets or lines have been occupied. The coarser-grained approach significantly reduces the noise introduced by the pseudo-random replacement policy and world switching. Using our Prime+Count technique, we build covert channels in single-core and cross-core scenarios in the TrustZone architecture. Our results demonstrate that Prime+Count is an effective technique for enabling cross-world covert channels on ARM TrustZone.
Haehyun Cho, Donguk Kim 0003, Jinbum Park, Choong-Hoon Lee, Ziming Zhao 0001, Adam Doupé, Gail-Joon Ahn
ACSAC4