Demo Data from SIGIR 2026 / reviewers in the wild / expert
Nicholas Gordon
dblp:241/7452
· DBLP profile ↗
4ranked-venue papers
3as first author
4since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Cloud and datacenter computing · 60% Parallel and multicore computing · 20% Hardware accelerators and domain-specific architectures · 10% | |
| Network and information security
1 paper |
Hardware security and side channels · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Software maintenance and evolution · 100% |
Topics — the 8 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › trusted execution environments
heterogeneous TEE |
1.0 | 1 | 2026 | TEEM³: Core-Independent and Cooperating Trusted Execution Environments · ASPLOS (2) 2026 |
Hardware security and side channels
trusted execution environments |
1.0 | 1 | 2026 | TEEM³: Core-Independent and Cooperating Trusted Execution Environments · ASPLOS (2) 2026 |
Cloud and datacenter computing
resource management |
0.6 | 1 | 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC Systems · HPDC 2022 |
Parallel and multicore computing › task scheduling › process scheduling
space-sharing and time-sharing |
0.6 | 1 | 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC Systems · HPDC 2022 |
Cloud and datacenter computing
virtualization |
0.6 | 1 | 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC Systems · HPDC 2022 |
Cloud and datacenter computing › virtualization
virtual machine migration |
0.6 | 1 | 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC Systems · HPDC 2022 |
GPUs and heterogeneous computing › heterogeneous architecture
heterogeneous processors |
0.3 | 1 | 2026 | TEEM³: Core-Independent and Cooperating Trusted Execution Environments · ASPLOS (2) 2026 |
Software maintenance and evolution › software evolution › software adaptation
dynamic reconfiguration |
0.2 | 1 | 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC Systems · HPDC 2022 |
Methods — techniques the papers use, named apart from their topics
trusted execution environment · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | TEEM³: Core-Independent and Cooperating Trusted Execution EnvironmentsabstractTrusted Execution Environments (TEEs) enable secure code execution on machines that are not fully trusted by the user who runs the workload. However, existing TEE solutions mostly target CPUs and are typically tied to one specific instruction set architecture. Although some accelerators also provide support for TEEs, this leads to multiple, different TEE implementations on the same system, increasing its complexity and trusted computing base (TCB). This challenge becomes particularly apparent when workloads span heterogeneous processing units, because the diversity of TEE implementations complicates the creation of secure communication channels between the individual TEEs. Nils Asmussen, Sebastian Haas, Carsten Weinhold, Nicholas Gordon, Stephan Gerhold, Friedrich Pauls, Nilanjana Das, Michael Roitzsch |
ASPLOS (2) | 4 |
| 2025 | Applying Modern Verification Techniques to a Root-of-Trust BootloaderabstractVerification tools have become more approachable over the last few years, especially those that allow developers to write proof annotations in the target programming language they already know. We applied one such tool, Verus, to the root-of-trust bootloader of an embedded platform. We report from the point of view of a systems developer, who wants to use verification as a quality-assurance tool for an existing codebase, which was not written with verification in mind. We discuss how we specified a key security property using pre- and post-conditions in the source code, guiding Verus to prove that this property does indeed hold. Nicholas Gordon, Carsten Weinhold |
PLOS@SOSP | 1 |
| 2022 | Lifting and Dropping VMs to Dynamically Transition Between Time- and Space-sharing for Large-Scale HPC SystemsabstractAs HPC environments increasingly integrate with edge based systems, system architectures will need to handle a broader class of workloads and scheduling requirements. One result of this shift will be the need to simultaneously support bulk-synchronous parallel (BSP) and on-demand service based applications on the same infrastructure. This in turn will require that future resource management approaches utilize both space-shared as well as time-shared resource scheduling strategies. In this work we introduce the concept of "VM-lifting'' (and its inverse "VM-Dropping'') which allows dynamically switching an HPC workload between space-shared and time-shared scheduling regimes. Our work targets co-kernel based HPC system software environments, in which multiple specialized OS kernels execute natively on dedicated physical resource partitions inside a single compute node. With VM-lifting, a native co-kernel can be migrated at runtime to and from locally hosted Virtual Machine Environments due to changing scheduling requirements of the node. This allows an HPC node to be dynamically (re-)configured as either a time-shared Infrastructure-as-a-Service (IaaS) resource or a dedicated space shared resource based on the current workload demands. We have implemented this approach in the context of the Hobbes Exascale System Software stack and have demonstrated that a node can be reconfigured with minimal impact on the running applications. Nicholas Gordon, Jack Lange |
HPDC | 1 |
| 2021 | Covirt: Lightweight Fault Isolation and Resource Protection for Co-KernelsabstractThe challenges of the exascale era have generated a number of advancements in HPC systems software, with co-kernel architectures emerging as one such novel approach for HPC operating system and runtime (OS/R) design. Cokernels function by running multiple specialized, lightweight OS kernels natively on the same host as a general purpose OS/R. These specialized kernels are able to provide optimized OS/R environments for HPC applications while still retaining access to the full feature set of the co-running general purpose OS/R. While co-kernels are able to effectively optimize for performance, they generally lack effective mechanisms for cross OS/R fault isolation and resource protection. In this paper we present Covirt, a lightweight OS/R protection layer that leverages the hardware virtualization features found on modern CPUs. Covirt interposes a minimal hypervisor layer between a co-kernel OS/R and hardware to prevent OS level faults from impacting other OS/Rs running on the same system. Covirt is different from other virtualization-based approaches due to the level of integration necessary between the co-kernel instances, requiring the support of higher level semantic interfaces between the different OS/Rs. Covirt features a split architecture consisting of a hypervisor and controller module that continuously monitors changes to the underlying resource partitioning and translates those events to hypervisor configuration changes. We have implemented a prototype of Covirt in the context of the Hobbes exascale OS/R stack, specifically targeting the Pisces co-kernel framework and Kitten Lightweight Kernel. Our evaluation shows that Covirt is able to add fault isolation for memory and interrupt processing with minimal performance overheads. Nicholas Gordon, Jack Lange |
IPDPS | 1 |