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Abdulkader O. Barbir

dblp:25/4194 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 50% Processor architecture and microarchitecture · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › special-purpose processor
matrix multiplication array
0.011991
A Class of Low Complexity High Concurrence Algorithms · IEEE Trans. Parallel Distributed Syst. 1991
Parallel and multicore computing
parallel architecture
0.011991
A Class of Low Complexity High Concurrence Algorithms · IEEE Trans. Parallel Distributed Syst. 1991
YearPublicationVenuePosition
1991 A Class of Low Complexity High Concurrence Algorithms
abstract
A nonconventional approach to the analysis of dedicated computing structures in which the number of compute cycles is used as a design parameter to determine families of transformations implementable in the structure is presented. Using this approach, a single architecture can be used to implement a family of transformations with varying degrees of complexity. The transformations generated by a matrix multiplication array are considered in detail. It is shown that, for some real-time applications it becomes possible to incorporate the compute time as a constraint for designs based in optimality criteria. In particular, a least square approximation problem is discussed.>
Jorge L. Aravena, Abdulkader O. Barbir
IEEE Trans. Parallel Distributed Syst.2