The Voxel-based point cloud neural networks (PNNs) have demonstrated exceptional accuracy across various 3D point cloud tasks. However, the practical deployment of Voxel-based PNNs on resource-constrained edge devices faces significant challenges, primarily stemming from two memory-access intensive operations: the map search operation and the sparse 3D convolution (Spconv3D) operation. Specifically, three key challenges remain to be addressed, including: (1) the extensive sequential coordinate comparisons and irregular off-chip memory access patterns generated by map search operation; (2) the considerable data movement requirements associated with data-intensive convolution operation; (3) significant workload imbalance resulting from point cloud sparsity and irregularity.In this paper, we propose Voxel-PIM, an efficient SRAM-based accelerator for Voxel-based PNNs that leverages in-memory search and compute techniques. The Voxel-PIM architecture primarily contains two Processing-in-Memory (PIM) cores: a Content-Addressable Memory (CAM)-based Search Core and a Compute-in-Memory (CIM)-based Computing Core. For the CAM core, we propose the KD-Tree-based Partitioning and Searching (KDPS) strategy, which activates only a fraction of the array and reduces search energy consumption during search operation. For the CIM array, we introduce a novel submatrices mapping method to flexibly support both Spconv3D and Conv2D operations. Furthermore, we propose a Weight Workload Balanced (W2B) method to mitigate computational imbalance. The hardware performance of Voxel-PIM is estimated for a 22nm technology. The simulation results demonstrate that Voxel-PIM achieves averagely 1.53~7.26× higher energy efficiency, 1.03~2.98× speed up in detection task, and 1.4~11.4× speed up in segmentation task compared to state-of-the-art (SOTA) point cloud accelerators and general-purpose processors.

Point-based point cloud neural networks (PNNs) have shown remarkable accuracy in various applications. However, the performance of PNNs is usually limited on resource-constrained edge devices. This paper presents Point-CIM, an efficient Compute-in-Memory (CIM) based accelerator for PNNs, with software and hardware co-optimization. A reconfigurable CIM unit, which exploits the inherent zero-bit-skipping capability of CIM array, is designed to efficiently process Multiply-Accumulate (MAC) operations on decomposed feature data with high bit sparsity. A Voxel-Morton-sorted Partitioning (VMP) method combined with Channel-wise Minimum (CM) base point selection is proposed to improve the decomposition bit sparsity further and reduce the hardware implementation overhead. Additionally, a detailed Bit-level Truncation Quantization (BTQ) method is proposed to directly compress the bit-width of the offset without incurring any additional hardware overhead. Based on this decomposition method, a Pre-decomposition (PD) data movement strategy is employed to reduce data transfers of intermediate features between the on-chip buffer and CIM array. Extensive evaluation experiments on multiple datasets show that Point-CIM achieves an average speedup of $1.69 \times$ to $9.63 \times$, and $3.11 \times$ to $17.32 \times$ improvement in energy efficiency, compared to state-of-the-art accelerators and general-purpose processors.

The 3D point cloud perception has emerged as a fundamental role for a wide range of applications. In particular, with the rapid development of neural networks, the voxel-based networks attract great attention due to their excellent performance. Various accelerator designs have been proposed to improve the hardware performance of voxel-based networks, especially to speed up the map search process. However, several challenges still exist including: (1) massive off-chip data access volume caused by map search operations, notably for high resolution and dense distribution cases, (2) frequent data movement for data-intensive convolution operations, (3) imbalanced workload caused by irregular sparsity of point data.