The Fletcher checksum (FC) is a means of error detection that is analogous to cyclic redundancy checking but easier to implement in software. Now FC actually has two versions, one is Fletcher's original paper version termed as FC and the other is RFC1146 version termed as FC-RFC. This paper shows that the FC is a cyclic code. This is done by introducing a cyclic code known as the cyclic Fletcher code (CFC) and then showing that the CFC is equivalent to the FC. The clear algebraic structure of cyclic codes is used to analyze the code block length and code distance, and then the single error correction, double error detection, and burst error detection of the CFC are analyzed. Also given is the mathematical relationship between the CFC and a modified FC. Finally, the issue of implementation is considered, and a new scheduling for the CFC is proposed to prevent data hazards. A simulation shows that the proposed scheduling offers improvements of at least 46% in throughput for the CFC and FC-RFC.

This article describes a fast Reed-Solomon encoding algorithm with four and seven parity symbols in between. First, we show that the syndrome of Reed-Solomon codes can be computed via the Reed-Muller transform. Based on this result, the fast encoding algorithm is then derived. Analysis shows that the proposed approach asymptotically requires 3 XORs per data bit, representing an improvement over previous algorithms. The simulation demonstrates that the performance of the proposed approach improves with the increase of code length and is superior to other methods. In particular, when the parity number is 5, the proposed approach is about two times faster than other cutting-edge methods.