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Leo de Castro

dblp:268/4593 · DBLP profile ↗
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8ranked-venue papers
5as first author
8since 2021 · last 2026
0009-0005-3190-6416ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 4 · 4 first-author · 4 since 2021Systems, architecture and hardware · 3 · 3 since 2021Artificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
8 papers
Cryptographic primitives and cryptanalysis · 67% Cryptographic protocols and secure computation · 23% Security and privacy of machine learning · 10%
Computer architecture, parallel and distributed computing, and storage systems
4 papers
Hardware accelerators and domain-specific architectures · 82% GPUs and heterogeneous computing · 7% Reconfigurable computing and FPGAs · 5%

Topics — the 17 heaviest of 18, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cryptographic primitives and cryptanalysis › homomorphic encryption
fully homomorphic encryption
1.732025
EncryptedLLM: Privacy-Preserving Large Language Model Inference via GPU-Accelerated Fully Homomorphic Encryption · ICML 2025
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption · MICRO 2023
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption · HPCA 2023
Hardware accelerators and domain-specific architectures › cryptographic accelerator
fully homomorphic encryption accelerator
1.322023
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption · MICRO 2023
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption · HPCA 2023
Cryptographic primitives and cryptanalysis
homomorphic encryption
1.012026
Leveraging ASIC AI Chips for Homomorphic Encryption · HPCA 2026
Cryptographic primitives and cryptanalysis › finite field arithmetic
number theoretic transform
1.012026
Leveraging ASIC AI Chips for Homomorphic Encryption · HPCA 2026
Hardware accelerators and domain-specific architectures › cryptographic accelerator
homomorphic encryption accelerator
1.012026
Leveraging ASIC AI Chips for Homomorphic Encryption · HPCA 2026
Security and privacy of machine learning
privacy-preserving inference
0.912025
EncryptedLLM: Privacy-Preserving Large Language Model Inference via GPU-Accelerated Fully Homomorphic Encryption · ICML 2025
Cryptographic primitives and cryptanalysis › homomorphic encryption
bootstrapping
0.922023
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption · MICRO 2023
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption · HPCA 2023
Cryptographic protocols and secure computation
private information retrieval
0.812024
VeriSimplePIR: Verifiability in SimplePIR at No Online Cost for Honest Servers · USENIX Security Symposium 2024
Cryptographic protocols and secure computation
verifiable computation
0.812024
VeriSimplePIR: Verifiability in SimplePIR at No Online Cost for Honest Servers · USENIX Security Symposium 2024
Cryptographic primitives and cryptanalysis › cryptographic foundations › cryptographic commitments
functional commitments
0.712023
Functional Commitments for All Functions, with Transparent Setup and from SIS · EUROCRYPT (3) 2023
Hardware accelerators and domain-specific architectures
cryptographic accelerator
0.712023
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption · HPCA 2023
Cryptographic protocols and secure computation
function secret sharing
0.612022
Lightweight, Maliciously Secure Verifiable Function Secret Sharing · EUROCRYPT (1) 2022
Compilers and program optimization › program transformation
compiler transformations
0.312026
Leveraging ASIC AI Chips for Homomorphic Encryption · HPCA 2026
GPUs and heterogeneous computing
GPU computing
0.312025
EncryptedLLM: Privacy-Preserving Large Language Model Inference via GPU-Accelerated Fully Homomorphic Encryption · ICML 2025
Cryptographic primitives and cryptanalysis › post-quantum cryptography
lattice-based cryptography
0.212024
VeriSimplePIR: Verifiability in SimplePIR at No Online Cost for Honest Servers · USENIX Security Symposium 2024
Reconfigurable computing and FPGAs
FPGA accelerator
0.212023
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption · HPCA 2023
Memory systems
memory-bound computation
0.212023
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption · MICRO 2023

Methods — techniques the papers use, named apart from their topics

memory-aligned transformation · 3.0low-precision matrix multiplication · 3.0activation function approximation · 1.7GPU acceleration · 1.7memory-aware design · 1.3logistic regression · 1.3
YearPublicationVenuePosition
2026 Leveraging ASIC AI Chips for Homomorphic Encryption
abstract
Homomorphic Encryption (HE) provides strong data privacy for cloud services but at the cost of prohibitive computational overhead. While GPUs have emerged as a practical platform for accelerating HE, there remains an order-ofmagnitude energy-efficiency gap compared to specialized (but expensive) HE ASICs. This paper explores an alternate direction: leveraging existing AI accelerators, like Google's TPUs with coarse-grained compute and memory architectures, to offer a path toward ASIC-level energy efficiency for HE. However, this architectural paradigm creates a fundamental mismatch with SoTA HE algorithms designed for GPUs. These algorithms rely heavily on: (1) high-precision (32-bit) integer arithmetic to now run on a TPU's low-throughput vector unit, leaving its high-throughput low-precision (8-bit) matrix engine (MXU) idle, and (2) fine-grained data permutations that are inefficient on the TPU's coarse-grained memory subsystem. Consequently, porting GPU-optimized HE libraries to TPUs results in severe resource under-utilization and performance degradation. To tackle above challenges, we introduce CROSS, a compiler framework that systematically transforms HE workloads to align with the TPU's architecture. CROSS makes two key contributions: (1) Basis-Aligned Transformation (BAT), a novel technique that converts high-precision modular arithmetic into dense, low-precision (INT8) matrix multiplications, unlocking and improving the utilization of TPU's MXU for HE, and (2) Memory-Aligned Transformation (MAT), which eliminates costly runtime data reordering by embedding reordering into compute kernels through offline parameter transformation. Our evaluation on a real single-host Google TPU v6e refreshes the SoTA Number Theoretic Transform (NTT) throughput record with up-to$1.43 \times$throughput improvement over WarpDrive on a NVIDIA A100. Furthermore, CROSS achieves$451 \times, 7.81 \times, 1.83 \times, 1.31 \times, 1.86 \times$, and$1.15 \times$higher throughput per watt than OpenFHE, WarpDrive, FIDESlib, FAB, HEAP, and Cheddar, respectively, establishing AI ASIC as the SotA efficient platform for HE operators. Code: https://github.com/EfficientPPML/CROSS.
Jianming Tong, Jingtian Dang, Leo de Castro, Anirudh Itagi, Anupam Golder, Asra Ali, Jeremy Kun, Jevin Jiang, Arvind 0001, G. Edward Suh, Tushar Krishna
HPCA4
2025 EncryptedLLM: Privacy-Preserving Large Language Model Inference via GPU-Accelerated Fully Homomorphic Encryption
abstract
As large language models (LLMs) become more powerful, the computation required to run these models is increasingly outsourced to a third-party cloud. While this saves clients’ computation, it risks leaking the clients’ LLM queries to the cloud provider. Fully homomorphic encryption (FHE) presents a natural solution to this problem: simply encrypt the query and evaluate the LLM homomorphically on the cloud machine. The result remains encrypted and can only be learned by the client who holds the secret key. In this work, we present a GPU-accelerated implementation of FHE and use this implementation to benchmark an encrypted GPT-2 forward pass, with runtimes over $200\times$ faster than the CPU baseline. We also present novel and extensive experimental analysis of approximations of LLM activation functions to maintain accuracy while achieving this performance.
Leo de Castro, Daniel Escudero 0001, Adya Agrawal, Antigoni Polychroniadou, Manuela M. Veloso
ICML1
2024 VeriSimplePIR: Verifiability in SimplePIR at No Online Cost for Honest Servers
Leo de Castro, Keewoo Lee
USENIX Security Symposium1
2023 Functional Commitments for All Functions, with Transparent Setup and from SIS
Leo de Castro, Chris Peikert
EUROCRYPT (3)1
2023 FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption
abstract
Fully Homomorphic Encryption (FHE) offers protection to private data on third-party cloud servers by allowing computations on the data in encrypted form. To support general-purpose encrypted computations, all existing FHE schemes require an expensive operation known as "bootstrapping". Unfortunately, the computation cost and the memory bandwidth required for bootstrapping add significant overhead to FHE-based computations, limiting the practical use of FHE.In this work, we propose FAB, an FPGA-based accelerator for bootstrappable FHE. Prior FPGA-based FHE accelerators have proposed hardware acceleration of basic FHE primitives for impractical parameter sets without support for bootstrapping. FAB, for the first time ever, accelerates bootstrapping (along with basic FHE primitives) on an FPGA for a secure and practical parameter set. The key contribution of this work is the architecture of a balanced FAB design, which is not memory bound. In our design, we leverage recent algorithms for bootstrapping while being cognizant of the compute and memory constraints of our FPGA. In addition, we use a minimal number of functional units for computing, operate at a low frequency, leverage high data rates to and from main memory, utilize the limited on-chip memory effectively, and perform careful operation scheduling.We evaluate FAB using a single Xilinx Alveo U280 FPGA and by scaling it to a multi-FPGA system consisting of eight such FPGAs. For bootstrapping a fully-packed ciphertext, while operating at 300MHz, FAB outperforms existing state-of-the-art CPU and GPU implementations by 213× and 1.5× respectively. Our target FHE application is training a logistic regression model over encrypted data. For logistic regression model training scaled to 8 FPGAs on the cloud, FAB outperforms a CPU and GPU by 456× and 9.5× respectively, providing practical performance at a fraction of the ASIC design cost.
Rashmi S. Agrawal 0001, Leo de Castro, Guowei Yang 0005, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
HPCA2
2023 MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption
abstract
Cloud computing has made it easier for individuals and companies to get access to large compute and memory resources. However, it has also raised privacy concerns about the data that users share with the remote cloud servers. Fully homomorphic encryption (FHE) offers a solution to this problem by enabling computations over encrypted data. Unfortunately, all known constructions of FHE require a noise term for security, and this noise grows during computation. To perform unlimited computations on the encrypted data, we need to perform a periodic noise reduction step known as bootstrapping. This bootstrapping operation is memory-bound as it requires several GBs of data. This leads to orders of magnitude increase in the time required for operating on encrypted data as compared to unencrypted data.
Rashmi S. Agrawal 0001, Leo de Castro, Chiraag Juvekar, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
MICRO2
2022 Asymptotically Quasi-Optimal Cryptography
Leo de Castro, Carmit Hazay, Yuval Ishai, Vinod Vaikuntanathan, Muthuramakrishnan Venkitasubramaniam
EUROCRYPT (1)1
2022 Lightweight, Maliciously Secure Verifiable Function Secret Sharing
Leo de Castro, Antigoni Polychroniadou
EUROCRYPT (1)1