This paper describes the investigation performed to select impedance matching networks required to support zero loss digital end office switching. Subjective test results showed that 8 dB of sing margin is sufficient to prevent the introduction of additional degradations over the range of echo path delays associated with digital Class 5 switching. Analysis of loop data shows that balance networks of 700ω paralleled by a 0.05 μF capacitor for non-loaded loops and 1400 ω for loaded loops will give sufficient return losses to provide the 8 dB of sing margin. In addition, these networks will give significant improvement in echo performance on DDD calls.