Demo Data from SIGIR 2026 / reviewers in the wild / expert
Tommaso Pozzetti
dblp:280/2871
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2021
0000-0001-9940-2373ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Concurrent programming · 100% | |
| Theoretical computer science
1 paper |
Distributed computing theory · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Distributed systems · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Concurrent programming
concurrency bug detection |
0.5 | 1 | 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection · IEEE Trans. Parallel Distributed Syst. 2021 |
Concurrent programming › concurrency bug detection › data race detection
dynamic race detection |
0.5 | 1 | 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection · IEEE Trans. Parallel Distributed Syst. 2021 |
Distributed computing theory
logical clocks |
0.5 | 1 | 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection · IEEE Trans. Parallel Distributed Syst. 2021 |
Distributed computing theory › logical clocks
vector clocks |
0.5 | 1 | 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection · IEEE Trans. Parallel Distributed Syst. 2021 |
Distributed systems
causality tracking |
0.1 | 1 | 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection · IEEE Trans. Parallel Distributed Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
shared-memory and message-passing implementation · 1.5prime-number encoding · 1.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race DetectionabstractCausality tracking among events is a fundamental challenge in distributed environments. Much previous work on this subject has focused on designing an efficient and scalable protocol to represent logical time. Several implementations of logical clocks have been proposed, most recently the Encoded Vector Clock (EVC), a protocol to encode Vector Clocks (VC) in scalar numbers through the use of prime numbers, to improve performance and scalability. We propose and formalize the concept of Resettable Encoded Vector Clock (REVC), a new logical clock implementation, which builds on the EVC to tackle its very high growth rate issue. We show how our REVC can be applied in both shared memory systems and message passing systems to achieve a consistent logical clock. We show, through practical examples, the advantage of REVC's growth rate with respect to EVC's growth rate. Finally, we show a practical application of the REVC to the dynamic race detection problem in multi-threaded environments. We compare our tool to the currently existing VC-based tool DJIT+to show how the REVC can help in achieving higher performance with respect to the Vector Clock. Tommaso Pozzetti, Ajay D. Kshemkalyani |
IEEE Trans. Parallel Distributed Syst. | 1 |