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Nick Wanninger

dblp:290/8386 · also Nicholas C. Wanninger, Nicholas Wanninger · DBLP profile ↗
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5ranked-venue papers
3as first author
5since 2021 · last 2025
0000-0001-7445-8186ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 3 first-author · 5 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
5 papers
Runtime systems and virtual machines · 38% Operating systems · 34% Compilers and program optimization · 28%
Computer architecture, parallel and distributed computing, and storage systems
4 papers
Cloud and datacenter computing · 38% Parallel and multicore computing · 30% Memory systems · 25%

Topics — the 13 heaviest of 17, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Runtime systems and virtual machines
binary translation
1.422025
Virtualization So Light, it Floats! Accelerating Floating Point Virtualization · HPDC 2025
FPVM: Towards a Floating Point Virtual Machine · HPDC 2022
Operating systems › resource management
memory management
0.812024
Getting a Handle on Unmanaged Memory · ASPLOS (3) 2024
Compilers and program optimization › parallelization
nested parallelism
0.812024
Compiling Loop-Based Nested Parallelism for Irregular Workloads · ASPLOS (2) 2024
Memory systems › memory management
fragmentation
0.812024
Getting a Handle on Unmanaged Memory · ASPLOS (3) 2024
Operating systems
virtualization
0.612022
Isolating functions at the hardware limit with virtines · EuroSys 2022
Cloud and datacenter computing › virtualization
hardware-assisted virtualization
0.612022
Isolating functions at the hardware limit with virtines · EuroSys 2022
Cloud and datacenter computing
serverless computing
0.612022
Isolating functions at the hardware limit with virtines · EuroSys 2022
Operating systems › resource management › memory management
memory allocation
0.212024
Getting a Handle on Unmanaged Memory · ASPLOS (3) 2024
Parallel and multicore computing › parallel programming models › task parallelism
fork-join parallelism
0.212024
Compiling Loop-Based Nested Parallelism for Irregular Workloads · ASPLOS (2) 2024
Parallel and multicore computing › task partitioning
granularity control
0.212024
Compiling Loop-Based Nested Parallelism for Irregular Workloads · ASPLOS (2) 2024
Parallel and multicore computing
parallel programming models
0.212024
Compiling Loop-Based Nested Parallelism for Irregular Workloads · ASPLOS (2) 2024
Parallel and multicore computing › parallel programming runtimes
runtime systems and scheduling
0.212024
Compiling Loop-Based Nested Parallelism for Irregular Workloads · ASPLOS (2) 2024
Systems and software security › trusted computing
trusted execution
0.212022
Isolating functions at the hardware limit with virtines · EuroSys 2022

Methods — techniques the papers use, named apart from their topics

hypervisor design · 1.7hardware virtualization · 1.7heartbeat scheduling · 1.5handle-based indirection · 1.5compacting garbage collection · 1.5binary transformation · 1.1IR transformation · 1.1trap short-circuiting · 0.9kernel bypass · 0.9instruction sequence emulation · 0.9trap-and-emulate · 0.6
YearPublicationVenuePosition
2025 Virtualization So Light, it Floats! Accelerating Floating Point Virtualization
abstract
Floating point virtualization enables unmodified application binaries to utilize alternative arithmetic systems such as MPFR without code changes, but its performance overhead is a barrier to adoption. The existing trap-and-emulate model suffers from a significant virtualization bottleneck using general-purpose signal delivery mechanisms which take thousands of cycles. We introduce three techniques to reduce virtualization overhead. Trap short-circuiting bypasses general-purpose signal delivery for an 8x reduction in trap delegation overhead. Instruction sequence emulation amortizes trap costs by emulating multiple instructions per trap, achieving up to 32x reduction in trap frequency. Finally, kernel-bypass for correctness instrumentation eliminates traps and signals for correctness and reduces related overheads substantially. Our implementation within the FPVM system on x64/Linux demonstrates a 10x reduction in per-instruction overhead which, compared to the lower bound performance set by the alternative arithmetic system, drops virtualization overhead from up to 20x to 1.65x. This is for the alternative arithmetic system that is the worst case for virtualization overheads. More expensive systems, like MPFR, fare even better.
Nick Wanninger, Nadharm Dhiantravan, Peter A. Dinda
HPDC1
2024 Compiling Loop-Based Nested Parallelism for Irregular Workloads
abstract
Modern programming languages offer special syntax and semantics for logical fork-join parallelism in the form of parallel loops, allowing them to be nested, e.g., a parallel loop within another parallel loop. This expressiveness comes at a price, however: on modern multicore systems, realizing logical parallelism results in overheads due to the creation and management of parallel tasks, which can wipe out the benefits of parallelism. Today, we expect application programmers to cope with it by manually tuning and optimizing their code. Such tuning requires programmers to reason about architectural factors hidden behind layers of software abstractions, such as task scheduling and load balancing. Managing these factors is particularly challenging when workloads are irregular because their performance is input-sensitive. This paper presents HBC, the first compiler that translates C/C++ programs with high-level, fork-join constructs (e.g., OpenMP) to binaries capable of automatically controlling the cost of parallelism and dealing with irregular, input-sensitive workloads. The basis of our approach is Heartbeat Scheduling, a recent proposal for automatic granularity control, which is backed by formal guarantees on performance. HBC binaries outperform OpenMP binaries for workloads for which even entirely manual solutions struggle to find the right balance between parallelism and its costs.
Yian Su, Mike Rainey, Nick Wanninger, Nadharm Dhiantravan, Jasper Liang, Umut A. Acar, Peter A. Dinda, Simone Campanoni
ASPLOS (2)3
2024 Getting a Handle on Unmanaged Memory
abstract
The inability to relocate objects in unmanaged languages brings with it a menagerie of problems. Perhaps the most impactful is memory fragmentation, which has long plagued applications such as databases and web servers. These issues either fester or require Herculean programmer effort to address on a per-application basis because, in general, heap objects cannot be moved in unmanaged languages. In contrast, managed languages like C# cleanly address fragmentation through the use of compacting garbage collection techniques built upon heap object movement. In this work, we bridge this gap between unmanaged and managed languages through the use of handles, a level of indirection allowing heap object movement. Handles open the door to seamlessly employing runtime features from managed languages in existing, unmodified code written in unmanaged languages. We describe a new compiler and runtime system, Alaska, that acts as a drop-in replacement for malloc. Without any programmer effort, the Alaska compiler transforms pointer-based code to utilize handles, with optimizations to minimize performance impact. A codesigned runtime system manages this new level of indirection and exploits heap object movement via an extensible service interface. We investigate the overheads of Alaska on large benchmarks and applications spanning multiple domains. To show the power and extensibility of handles, we use Alaska to eliminate fragmentation on the heap through defragmentation, reducing memory usage by up to 40% in Redis.
Nick Wanninger, Tommy McMichen, Simone Campanoni, Peter A. Dinda
ASPLOS (3)1
2022 Isolating functions at the hardware limit with virtines
abstract
An important class of applications, including programs that leverage third-party libraries, programs that use user-defined functions in databases, and serverless applications, benefit from isolating the execution of untrusted code at the granularity of individual functions or function invocations. However, existing isolation mechanisms were not designed for this use case; rather, they have been adapted to it. We introduce virtines, a new abstraction designed specifically for function granularity isolation, and describe how we build virtines from the ground up by pushing hardware virtualization to its limits. Virtines give developers fine-grained control in deciding which functions should run in isolated environments, and which should not. The virtine abstraction is a general one, and we demonstrate a prototype that adds extensions to the C language. We present a detailed analysis of the overheads of running individual functions in isolated VMs, and guided by those findings, we present Wasp, an embeddable hypervisor that allows programmers to easily use virtines. We describe several representative scenarios that employ individual function isolation, and demonstrate that virtines can be applied in these scenarios with only a few lines of changes to existing codebases and with acceptable slowdowns.
Nick Wanninger, Joshua J. Bowden, Kirtankumar Shetty, Ayush Garg 0007, Kyle C. Hale
EuroSys1
2022 FPVM: Towards a Floating Point Virtual Machine
abstract
Alternatives to IEEE floating point arithmetic have become all the rage. Some extract more representational power out of the available bits. Others offer the potential for lower or higher precision than is available in IEEE-compatible hardware. Even an "interface to the real numbers" has recently been proposed. Using such alternative arithmetic systems within an existing scientific or other significant codebase is a major challenge, however. We explore how to address this challenge through virtualizing the IEEE floating point hardware, specifically on x64. The goal of the floating point virtual machine (FPVM) is to allow an existing application binary to be seamlessly extended to support the desired alternative arithmetic system with overheads determined by that system and not the virtualization mechanisms. We describe the prospects, issues, and tradeoffs for four different approaches for building FPVM: trap-and-emulate, trap-and-patch, binary transformation, and IR transformation. We then describe the design and implementation of our current design, which combines static binary analysis/translation and trap-and-emulate execution. We evaluate our FPVM implementation on several benchmarks, virtualizing them to use posits and MPFR. Finally, we comment on kernel- and hardware-level innovations that could further reduce overheads for floating point virtualization.
Peter A. Dinda, Nick Wanninger, Jiacheng Ma 0002, Alex Bernat, Charles Bernat, Souradip Ghosh, Christopher Kraemer, Yehya Elmasry
HPDC2