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Kecheng Huang

dblp:295/7080 · DBLP profile ↗
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15ranked-venue papers
5as first author
15since 2021 · last 2026
0009-0003-7204-0984ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 2 first-author · 8 since 2021Databases, data management, data science and information retrieval · 5 · 5 first-author · 5 since 2021Artificial intelligence and machine learning · 3 · 3 since 2021Security and privacy · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
7 papers
Storage systems · 88% Parallel and multicore computing · 10% Processor architecture and microarchitecture · 2%
Network and information security
2 papers
Security and privacy of machine learning · 75% Hardware security and side channels · 25%
Artificial intelligence
1 paper
Representation and self-supervised learning · 56% Information extraction and text analysis · 44%
Databases, data mining, and information retrieval
2 papers
Database system architecture and tuning · 54% Indexing and storage engines · 36% Transaction processing and concurrency control · 11%
Computer networks
1 paper
Wireless sensing and localization · 100%

Topics — the 22 heaviest of 26, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
key-value storage
2.942026
Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree · IEEE Trans. Knowl. Data Eng. 2026
HaSiS: A Hardware-assisted Single-index Store for Hybrid Transactional and Analytical Processing · FAST 2025
Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases · FAST 2022
Storage systems › key-value storage
LSM-tree
2.132026
Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree · IEEE Trans. Knowl. Data Eng. 2026
Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases · FAST 2022
Less is More: De-amplifying I/Os for Key-value Stores with a Log-assisted LSM-tree · ICDE 2021
Storage systems
flash and SSD
1.622025
Expanding Logical Space Freely: A Memory-efficient Mapping Table Design for Compressional SSDs · DAC 2025
PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core Architecture · DAC 2024
Storage systems › storage performance
i/o amplification
1.122026
Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree · IEEE Trans. Knowl. Data Eng. 2026
Less is More: De-amplifying I/Os for Key-value Stores with a Log-assisted LSM-tree · ICDE 2021
Storage systems
storage reliability
1.122026
Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree · IEEE Trans. Knowl. Data Eng. 2026
Less is More: De-amplifying I/Os for Key-value Stores with a Log-assisted LSM-tree · ICDE 2021
Storage systems › flash and SSD › flash memory management › garbage collection
write amplification
1.122022
Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases · FAST 2022
Less is More: De-amplifying I/Os for Key-value Stores with a Log-assisted LSM-tree · ICDE 2021
Natural language and speech › Information extraction and text analysis › text classification › multi-label text classification
hierarchical text classification
1.012026
LGSA: Label Geometry Structuring and Aligning for Hierarchical Text Classification · ACL (1) 2026
Storage systems › flash and SSD
write amplification reduction
1.012026
Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree · IEEE Trans. Knowl. Data Eng. 2026
Database system architecture and tuning
hybrid transactional and analytical processing
0.912025
HaSiS: A Hardware-assisted Single-index Store for Hybrid Transactional and Analytical Processing · FAST 2025
Wireless sensing and localization › radar sensing
mmwave radar sensing
0.912025
EchoLLM: LLM-Augmented Acoustic Eavesdropping Attack on Bone Conduction Headphones with mmWave Radar · USENIX Security Symposium 2025
Hardware security and side channels › side-channel attack › acoustic side channel
acoustic eavesdropping
0.912025
EchoLLM: LLM-Augmented Acoustic Eavesdropping Attack on Bone Conduction Headphones with mmWave Radar · USENIX Security Symposium 2025
Security and privacy of machine learning › adversarial attack
backdoor attack
0.912025
ToxicTextCLIP: Text-Based Poisoning and Backdoor Attacks on CLIP Pre-training · NeurIPS 2025
Security and privacy of machine learning
poisoning attack
0.912025
ToxicTextCLIP: Text-Based Poisoning and Backdoor Attacks on CLIP Pre-training · NeurIPS 2025
Security and privacy of machine learning › adversarial attack
textual adversarial attack
0.912025
ToxicTextCLIP: Text-Based Poisoning and Backdoor Attacks on CLIP Pre-training · NeurIPS 2025
Storage systems › flash and SSD › flash memory management
flash translation layer
0.912025
Expanding Logical Space Freely: A Memory-efficient Mapping Table Design for Compressional SSDs · DAC 2025
Parallel and multicore computing › synchronization
lock-free synchronization
0.812024
PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core Architecture · DAC 2024
Parallel and multicore computing
parallel programming models and runtimes
0.812024
PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core Architecture · DAC 2024
Indexing and storage engines › storage management
storage engine
0.612022
Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases · FAST 2022
Machine learning › Representation and self-supervised learning › representation learning › embedding learning › semantic embedding
label embedding
0.312026
LGSA: Label Geometry Structuring and Aligning for Hierarchical Text Classification · ACL (1) 2026
Storage systems
storage acceleration
0.312025
HaSiS: A Hardware-assisted Single-index Store for Hybrid Transactional and Analytical Processing · FAST 2025
Processor architecture and microarchitecture
multicore design
0.212024
PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core Architecture · DAC 2024
Transaction processing and concurrency control
logging
0.212022
Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases · FAST 2022

Methods — techniques the papers use, named apart from their topics

contrastive learning · 1.9prompt tuning · 1.0promotion and demotion · 0.9n-to-1 mapping · 0.9data poisoning · 0.9backdoor attack · 0.9sampling directory trees · 0.8multi-core request scheduling · 0.8lock-free pipelining · 0.8dynamic weight scaling · 0.8RNN-based trace regeneration · 0.8multi-level log structure · 0.5log-structured merge tree · 0.5
YearPublicationVenuePosition
2026 LGSA: Label Geometry Structuring and Aligning for Hierarchical Text Classification
abstract
Existing hierarchical text classification (HTC) methods typically use prompt tuning or contrastive learning to inject the label hierarchy into a model as prior knowledge to implicitly learn label embeddings for classification.However, such implicit learning fails to accurately reflect label geometry (i.e., feature spatial distribution of label embeddings), as it does not model hierarchy-aware geometric relations among labels.To address this issue, we propose a novel two-stage label geometry structuring and aligning framework, termed LGSA, which transforms the label hierarchy from an implicit prior into an explicit embedding.First, we propose a hierarchical geometric structuring (HGS) module that leverages a general orthogonal frame (GOF) to reconstruct an explicit label geometry conforming to the label hierarchy.The label geometry is then treated as a label prototype to guide model training.To facilitate the guidance, we thereby propose a hierarchical geometric aligning (HGA) module as a regularization term to align label geometry learned by the model with the explicit label prototype.Experiments on three realworld HTC datasets confirm that LGSA consistently outperforms existing state-of-the-art methods.
Shuai Zhang 0002, Weibo Xu, Jiahao Nie 0001, Kecheng Huang
ACL (1)4
2026 Reducing I/O Amplification for Key-Value Stores With a Log-Assisted Log-Structured Merge Tree
Kecheng Huang, Minyang Bao, Zhaoyan Shen, Zili Shao
IEEE Trans. Knowl. Data Eng.1
2025 Expanding Logical Space Freely: A Memory-efficient Mapping Table Design for Compressional SSDs
abstract
Compressional SSDs can be a mixed blessing. While they offer users expanded logical space beyond the physical capacity, they complicate the Flash Translation Layer (FTL) design by requiring a larger Logical-to-Physical (L2P) address mapping, which places a heavier burden on the limited in-SSD memory, leading to a degraded I/O performance. In this paper, we aim to reduce the memory footprint of the L2P mapping table in compressional SSDs by proposing a novel N-to-1 L2P mapping table design that consolidates multiple logical entries into a single entry. This approach eliminates the duplication of physical page numbers when a physical page contains several compressed logical pages. To accommodate the dynamic compression ratios of real-world workloads, we introduce promotion and demotion that enable mapping table entries to migrate between pages with different compression ratios. Additionally, to address the issue of partial invalidation-where some compressed logical pages within a physical page are invalid due to the N-to-1 mapping-we present a compression-aware garbage collection algorithm aimed at minimizing the number of copy operations for partially invalid physical pages. We have implemented our design in MQsim, a widely used SSD simulator, and have conducted a series of experiments to evaluate the effectiveness of the proposed techniques. The results demonstrate that our approach significantly reduces the mapping table size in compressional SSDs, leading to an improved mapping table cache hit ratio and a reduced I/O latency compared to traditional compressional SSDs.
Zixuan Huang 0011, Tianyu Wang 0009, Kecheng Huang, Zelin Du, Zili Shao
DAC3
2025 A Practical Learning-Based FTL for Memory Constrained Mobile Flash Storage
abstract
The rapidly growing mobile market is pushing flash storage manufacturers to expand capacity into the terabyte range. However, this presents a significant challenge for mobile storage management: more logical-to-physical page mappings are desired to be efficiently managed and cached while the available caching space is extremely limited. This motivates us to shift toward a new learning-based paradigm: rather than maintaining mappings for individual pages, the learning-based approach can represent mapping relationships for a set of continuous pages. However, to construct linear models, existing methods that either consume the already-limited memory space or reuse flash garbage collection demonstrate poor model construction capabilities or significantly degrade flash performance, making them impractical for real-world use. In this paper, we propose LFTL, a practical, learning-based on-demand flash translation layer design for flash management in mobile devices. In contrast to prior work that centered around gathering sufficient mappings for linear model construction, our key insight is that linear patterns can be extracted and refined by leveraging the orderly, LPA-aligned write stream typical of mobile devices. By doing this, highly accurate linear models can be constructed regardless of the constraints of mobile device's cache limitation. We have implemented a fully functional prototype of LFTL based on FEMU. Our evaluation results show that LFTL is more adaptable to memory-constrained storage devices than state-of-the-art learning-based approaches.
Zelin Du, Kecheng Huang, Tianyu Wang 0009, Xin Yao 0008, Renhai Chen, Zili Shao
DATE2
2025 HaSiS: A Hardware-assisted Single-index Store for Hybrid Transactional and Analytical Processing
Kecheng Huang, Zhaoyan Shen, Zili Shao, Feng Chen 0005, Tong Zhang 0002
FAST1
2025 Too Clever by Half: Detecting Sampling-based Model Stealing Attacks by Their Own Cleverness
abstract
Machine learning as a service (MLaaS) has gained significant popularity and market traction in recent years, driven by advancements in Artificial Intelligence particularly Generative AI (GAI). However, MLaaS faces severe challenges from sampling-based model stealing attacks (MSAs), where attackers strategically query the targeted ML models provided by MLaaS providers to minimize the query burden while closely replicating the model’s functionality. Such MSAs pose severe consequences, including intellectual property (IP) theft and potential leakage of private training data. Unfortunately, existing defenses either sacrifice model utility or fail to generalize across diverse MSAs.In this paper, we propose DIARY, an innovative detection method specifically tailored to sampling-based MSAs by exploiting their inherent sophistication. Our key insight is that ‘clever’ malicious queries tend to extract more information from the targeted (victim) model than typical benign queries, as these attacks iteratively refine their queries by examining and analyzing prior queries and the corresponding responses. Hence we design DIARY to extract timing dependence within a query sequence and incorporate contrastive learning for properly characterizing such dependency that holds for different sampling-based MSAs. Comprehensive evaluations using five different sampling-based MSAs and two state-of-the-art defense baselines across four popular datasets consistently validate DIARY’s superior performance.
Xin Yao 0002, Yimin Chen 0004, Kecheng Huang, Ming Zhao 0007
ICDCS4
2025 ToxicTextCLIP: Text-Based Poisoning and Backdoor Attacks on CLIP Pre-training
abstract
The Contrastive Language-Image Pretraining (CLIP) model has significantly advanced vision-language modeling by aligning image-text pairs from large-scale web data through self-supervised contrastive learning. Yet, its reliance on uncurated Internet-sourced data exposes it to data poisoning and backdoor risks. While existing studies primarily investigate image-based attacks, the text modality, which is equally central to CLIP's training, remains underexplored. In this work, we introduce ToxicTextCLIP, a framework for generating high-quality adversarial texts that target CLIP during the pre-training phase. The framework addresses two key challenges: semantic misalignment caused by background inconsistency with the target class, and the scarcity of background-consistent texts. To this end, ToxicTextCLIP iteratively applies: 1) a background-aware selector that prioritizes texts with background content aligned to the target class, and 2) a background-driven augmenter that generates semantically coherent and diverse poisoned samples. Extensive experiments on classification and retrieval tasks show that ToxicTextCLIP achieves up to 95.83\% poisoning success and 98.68% backdoor Hit@1, while bypassing RoCLIP, CleanCLIP and SafeCLIP defenses. The source code can be accessed via https://github.com/xinyaocse/ToxicTextCLIP/.
Xin Yao 0002, Yimin Chen 0004, Kecheng Huang, Ming Zhao 0007
NeurIPS5
2025 EchoLLM: LLM-Augmented Acoustic Eavesdropping Attack on Bone Conduction Headphones with mmWave Radar
Xin Yao 0002, Kecheng Huang, Yimin Chen 0004, Ming Zhao 0007
USENIX Security Symposium2
2025 TrustDedup: Secure data deduplication for IoT based on end-edge-cloud collaboration
Xin Yao 0002, Kecheng Huang, Ming Zhao 0007
J. Syst. Archit.4
2025 Stealthy and efficient adversarial example attack on video retrieval systems
Xin Yao 0002, Enlang Li, Yimin Chen 0004, Kecheng Huang, Fengxiao Tang, Ming Zhao 0007
Neural Networks5
2024 PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core Architecture
abstract
Modern SSD firmware is continuously optimized for higher parallelism to match the growing frontend PCIe bandwidth with more backend flash channels. Although a multi-core microprocessor is typically adopted to concurrently process independent NVMe requests from multiple NVMe queues, the existing one-to-many thread-request mapping model with each thread serving one or more incoming I/O requests has poor scalability due to severe lock contention problem, especially in cache management.
Zelin Du, Shaoqi Li, Zixuan Huang 0011, Jin Xue, Kecheng Huang, Tianyu Wang 0009, Zili Shao
DAC5
2024 Joint Directory, File and IO Trace Feature Extraction and Feature-based Trace Regeneration for Enterprise Storage Systems
abstract
For enterprise storage systems, users' directory/file and IO access traces are critical for fine-tuning and new designs. However, once these systems are deployed, only trace features with small sizes are allowed to be sent back to vendors. Therefore, it is crucial to develop effective techniques for highly compressed feature extraction and feature-based high-fidelity trace regeneration. Existing works primarily focus on I/O trace modeling and regeneration without considering the directory/file access information. In this paper, we propose a new technique, called Sketcher, that can sketch massive traces into highly compressed “joint features” with both directory/file and I/O characteristics, and then based on these features regenerate high-fidelity traces with a learning-based approach. For trace feature extraction, one key idea is to divide traces into multiple distance-associated segments, where each segment contains all files and IO accesses operating under the same directory and the differences between segments are represented as displacement of segment inside the directory tree. A dynamic weight scaling technique is proposed to further compress features considering feature criticality and the size quota, thereby achieving high compression ratios with critical characteristics (e.g., abnormal IO access patterns). For trace regeneration, a new learning-based RNN model is proposed to regenerate high-fidelity traces from extracted features based on sampling directory trees. We have implemented a fully functional prototype based on typical enterprise storage systems and evaluated Sketcher with real applications and benchmarks on Huawei OceanStor Dorado storage server. Results show that Sketcher can effectively extract features with marginal runtime overheads while achieving compression ratios up to 15.2K and regenerating high-fidelity traces.
Kecheng Huang, Xijun Li, Mingxuan Yuan, Zili Shao
ICDE1
2024 TPGraph: A Highly-scalable Time-partitioned Graph Model for Tracing Blockchain
abstract
The continuously increasing volume of blockchain data presents significant challenges to blockchain traceability. Current tracing approaches, which rely on heuristic analytics directly applied to blockchain data, exhibit degraded tracking accuracy due to the involvement of only partial data. On the other hand, incorporating all blockchain data for analytics is not scalable given the unprecedented data volumes. Interestingly, we observe that despite the vast amount of blockchain data, blockchain tracing primarily focuses on time-related transaction spaces rather than all transactions. This insight motivates us to rethink the blockchain tracing problem to achieve both accuracy and scalability.
Xiangao Chen, Tianyu Wang 0009, Kecheng Huang, Zili Shao
SYSTOR3
2022 Removing Double-Logging with Passive Data Persistence in LSM-tree based Relational Databases
Kecheng Huang, Zhaoyan Shen, Zhiping Jia, Zili Shao, Feng Chen 0005
FAST1
2021 Less is More: De-amplifying I/Os for Key-value Stores with a Log-assisted LSM-tree
abstract
In recent years, Log-Structured Merge Tree (LSMtree) based key-value stores, such as LevelDB and RocksDB, have been widely adopted in data center systems. Though optimized for high-speed write processing, the severe I/O amplification remains a critical constraint that hinders them from reaching their maximum performance potential. Unfortunately, this problem is deeply rooted in the fundamental design of the LSMtree structure. A small number of frequently updated key-value items could quickly pollute the entire tree structure, causing repeated changes in the structure and quickly amplifying the amount of disk IOs across the levels in the tree. In this paper, we present a novel scheme, called Log-assisted LSM-tree (L2SM), to fundamentally address the long-existing I/O amplification problem. L2SM adopts a small-size, multi-level log structure to isolate selected key-value items that have a disruptive effect on the tree structure, accumulates and absorbs the repeated updates in a highly efficient manner, and removes obsolete and deleted key-value items at an early stage. We have prototyped the L2SM structure based on LevelDB. Our evaluation with the YCSB benchmark shows promising results by reducing the amount of disk IOs by up to 40.2%, increasing the throughput by up to 67.4%, and decreasing the average latency by up to 40.1%.
Kecheng Huang, Zhiping Jia, Zhaoyan Shen, Zili Shao, Feng Chen 0005
ICDE1