This paper presents a new packet scheduling scheme, called frame-based exhaustive matching (FEM), to efficiently resolve the contention in a 3-stage Clos-network photonic switch. Using extended frames to aggregate cells from different incoming lines, the extended frame relaxes the stringent arbitration time constraint at the ultrafast port speed achievable in the photonic switch fabric. We also evaluate and analyze system performances, including throughput and packet delay, under various traffic conditions. At the expense of a moderate internal speedup of 1.5, throughput close to 100% under various traffic conditions can be achieved in a 3-stage Clos-network switch without expansion.

This paper presents a new petabit photonic packet switch (P/sup 3/S) architecture that is highly scalable both in dimension and capacity while maintaining high system performances. Using a new multidimensional photonic multiplexing scheme that includes space, time, wavelength, and subcarrier domains, we propose a photonic switch fabric based on a 3-stage Clos network to provide scalable large-dimension photonic interconnections with nanosecond reconfiguration speed. Packet buffering is implemented electronically at the input and output port controllers, allowing the central photonic switch fabric to transport high-speed optical signals without electrical-to-optical conversion. Optical time division multiplexing (OTDM) technology further scales port speed beyond electronic speed up to 160 Gbits/s to minimize the fiber connections. To solve output contention, we propose a new arbitration scheme, called frame-based exhaustive matching (FEM), using extended frames to aggregate cells from different incoming lines. The extended frame relaxes the stringent arbitration time constraint at a 160 Gbit/s port speed. Based on the FEM scheme in the proposed architecture, a 6400 /spl times/ 6400 switch with a total capacity of 1.024 petabit/s can be achieved with throughput close to 100% under various traffic conditions.

This paper presents a new petabit photonic packet switch architecture, called PetaStar. Using a new multidimensional photonic multiplexing scheme that includes space, time, wavelength, and subcarrier domains, PetaStar is based on a three-stage Clos-network photonic switch fabric to provide scalable large-dimension switch interconnections with nanosecond reconfiguration speed. Packet buffering is implemented electronically at the input and output port controllers, allowing the central photonic switch fabric to transport high-speed optical signals without electrical-to-optical conversion. Optical time-division multiplexing technology further scales port speed beyond electronic speed up to 160 Gb/s to minimize the fiber connections. To solve output port contention and internal blocking in the three-stage Clos-network switch, we present a new matching scheme, called c-MAC, a concurrent matching algorithm for Clos-network switches. It is highly distributed such that the input-output matching and routing-path finding are concurrently performed by scheduling modules. One feasible architecture for the c-MAC scheme, where a crosspoint switch is used to provide the interconnections between the arbitration modules, is also proposed. With the c-MAC scheme, and an internal speedup of 1.5, PetaStar with a switch size of 6400 × 6400 and total capacity of 1.024 petabit/s can be achieved at a throughput close to 100% under various traffic conditions.