Demo Data from SIGIR 2026 / reviewers in the wild / expert
Anbang Wu
dblp:301/9988
· DBLP profile ↗
10ranked-venue papers
4as first author
10since 2021 · last 2026
0009-0000-2596-9385ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 10 · 4 first-author · 10 since 2021Software engineering, systems software and programming languages · 5 · 1 first-author · 5 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
10 papers |
Emerging computing paradigms · 74% GPUs and heterogeneous computing · 7% Memory systems · 7% | |
| Computer graphics and multimedia
1 paper |
Rendering · 67% Virtual and augmented reality · 33% | |
| Software engineering, system software, and programming languages
2 papers |
Compilers and program optimization · 100% | |
| Theoretical computer science
1 paper |
Coding theory · 100% |
Topics — the 23 heaviest of 27, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms
quantum computer architecture |
5.7 | 8 | 2026 | CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line Encoding · HPCA 2026 Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse Accelerator · MICRO 2025 MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets · ASPLOS (2) 2024 |
Emerging computing paradigms › quantum computer architecture
quantum compilation |
2.3 | 3 | 2026 | CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line Encoding · HPCA 2026 MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets · ASPLOS (2) 2024 Paulihedral: a generalized block-wise compiler optimization framework for Quantum simulation kernels · ASPLOS 2022 |
Compilers and program optimization › domain-specific compilation
quantum compilation |
1.3 | 2 | 2023 | QuComm: Optimizing Collective Communication for Distributed Quantum Computing · MICRO 2023 OneQ: A Compilation Framework for Photonic One-Way Quantum Computation · ISCA 2023 |
Emerging computing paradigms › quantum computer architecture
distributed quantum computing |
1.2 | 2 | 2023 | QuComm: Optimizing Collective Communication for Distributed Quantum Computing · MICRO 2023 AutoComm: A Framework for Enabling Efficient Communication in Distributed Quantum Programs · MICRO 2022 |
Rendering › gaussian splatting
3d gaussian splatting |
1.0 | 1 | 2026 | Nebula: Infinite-Scale 3D Gaussian Splatting in VR via Collaborative Rendering and Accelerated Stereo Rasterization · ASPLOS (2) 2026 |
Rendering
collaborative rendering |
1.0 | 1 | 2026 | Nebula: Infinite-Scale 3D Gaussian Splatting in VR via Collaborative Rendering and Accelerated Stereo Rasterization · ASPLOS (2) 2026 |
Virtual and augmented reality › immersive rendering
VR rendering |
1.0 | 1 | 2026 | Nebula: Infinite-Scale 3D Gaussian Splatting in VR via Collaborative Rendering and Accelerated Stereo Rasterization · ASPLOS (2) 2026 |
Memory systems › shared memory
distributed shared memory |
1.0 | 1 | 2026 | FlashFuser: Expanding the Scale of Kernel Fusion for Compute-Intensive Operators via Inter-Core Connection · HPCA 2026 |
GPUs and heterogeneous computing › GPU kernel optimization
kernel fusion |
1.0 | 1 | 2026 | FlashFuser: Expanding the Scale of Kernel Fusion for Compute-Intensive Operators via Inter-Core Connection · HPCA 2026 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
1.0 | 1 | 2026 | FlashFuser: Expanding the Scale of Kernel Fusion for Compute-Intensive Operators via Inter-Core Connection · HPCA 2026 |
Emerging computing paradigms › quantum computer architecture
quantum circuit optimization |
1.0 | 1 | 2026 | CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line Encoding · HPCA 2026 |
Emerging computing paradigms › quantum computer architecture › quantum error correction
quantum error correction decoder |
0.9 | 1 | 2025 | Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse Accelerator · MICRO 2025 |
Coding theory › error-correcting codes
LDPC codes |
0.9 | 1 | 2025 | Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse Accelerator · MICRO 2025 |
Emerging computing paradigms
quantum computing |
0.8 | 1 | 2024 | MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets · ASPLOS (2) 2024 |
Emerging computing paradigms › quantum computer architecture
photonic quantum computing |
0.7 | 1 | 2023 | OneQ: A Compilation Framework for Photonic One-Way Quantum Computation · ISCA 2023 |
Processor architecture and microarchitecture
instruction scheduling |
0.6 | 1 | 2022 | Paulihedral: a generalized block-wise compiler optimization framework for Quantum simulation kernels · ASPLOS 2022 |
Emerging computing paradigms › quantum computing
quantum compiler |
0.6 | 1 | 2022 | AutoComm: A Framework for Enabling Efficient Communication in Distributed Quantum Programs · MICRO 2022 |
Emerging computing paradigms › quantum computer architecture
quantum error correction |
0.6 | 1 | 2022 | A synthesis framework for stitching surface code with superconducting quantum devices · ISCA 2022 |
Emerging computing paradigms › quantum computer architecture
qubit mapping |
0.3 | 2 | 2022 | A synthesis framework for stitching surface code with superconducting quantum devices · ISCA 2022 Paulihedral: a generalized block-wise compiler optimization framework for Quantum simulation kernels · ASPLOS 2022 |
Memory systems › on-chip memory
on-chip memory hierarchy |
0.3 | 1 | 2026 | FlashFuser: Expanding the Scale of Kernel Fusion for Compute-Intensive Operators via Inter-Core Connection · HPCA 2026 |
Hardware accelerators and domain-specific architectures › sparsity exploitation
sparsity-aware accelerator |
0.3 | 1 | 2025 | Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse Accelerator · MICRO 2025 |
Parallel and multicore computing › parallel computing › parallel communication
inter-node communication |
0.2 | 1 | 2023 | QuComm: Optimizing Collective Communication for Distributed Quantum Computing · MICRO 2023 |
Electronic design automation
physical design |
0.2 | 1 | 2022 | A synthesis framework for stitching surface code with superconducting quantum devices · ISCA 2022 |
Methods — techniques the papers use, named apart from their topics
collaborative rendering · 2.0accelerated stereo rasterization · 2.0satisfiability modulo theories · 1.7greedy strategy · 1.7BP+OSD · 1.7dataflow analysis · 1.0control line encoding · 1.0boolean expression simplification · 1.0analytical cost modeling · 1.0compilation framework · 0.8optimizing compilation · 0.7measurement-based computation · 0.7collective communication pattern analysis · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Nebula: Infinite-Scale 3D Gaussian Splatting in VR via Collaborative Rendering and Accelerated Stereo Rasterizationabstract3D Gaussian splatting (3DGS) has drawn significant attention in the architectural community recently. However, current architectural designs often overlook the 3DGS scalability, making them fragile for extremely large-scale 3DGS. Meanwhile, the VR bandwidth requirement makes it impossible to deliver high-fidelity and smooth VR content from the cloud. Zheng Liu 0022, Xingyang Li, Anbang Wu, Jieru Zhao, Fangxin Liu, Yiming Gan, Jingwen Leng, Yu Feng 0007 |
ASPLOS (2) | 4 |
| 2026 | FlashFuser: Expanding the Scale of Kernel Fusion for Compute-Intensive Operators via Inter-Core ConnectionabstractThe scaling of computation throughput continues to outpace improvements in memory bandwidth, making many deep learning workloads memory-bound. Kernel fusion is a key technique to alleviate this problem, but the fusion strategies of existing compilers and frameworks are limited to using local scratchpad memory. When the intermediate results exceed the limited capacity (such as FFN), the fusion fails. Although modern GPUs (like the NVIDIA H100) now incorporate an inter-core connection mechanism known as Distributed Shared Memory (DSM)—providing a larger, high-bandwidth, and low-latency on-chip memory pool—this hardware potential has yet to be exploited by software frameworks. To bridge this gap, we present FlashFuser, the first compiler framework to utilize inter-core connection for kernel fusion on modern GPUs. FlashFuser extends established fusion techniques to the DSM domain through three core contributions. First, we propose a powerful DSM-based communication abstraction that formalizes complex cluster-based data exchange patterns, such as reduce, shuffle and multiply. Second, we introduce a dataflow analyzer that generalizes loop scheduling, resource mapping, and tile selection to the distributed memory hierarchy; it determines the optimal execution order and tile sizes by quantifying data movement across memory levels. Finally, FlashFuser integrates these components into a unified search engine that employs analytical cost modeling and DSM-aware pruning strategies to efficiently discover the optimal execution plan. Our evaluation on an NVIDIA H100 GPU shows that FlashFuser reduces memory access by 58 % and delivers kernel speedups of$3.3 x$against highly-tuned libraries and 4.1x against state-of-the-art compilers, resulting in a$1.24 \times$end-to-end speedup. Yangjie Zhou 0001, Zihan Liu 0002, Xinhao Luo, Yijia Diao, Minyi Guo, Jidong Zhai, Yu Feng 0007, Chen Zhang 0001, Anbang Wu, Jingwen Leng |
HPCA | 10 |
| 2026 | CLINE: Improving Control Flow Compilation of Quantum Programs with Control Line EncodingabstractImportant applications like quantum search and quantum simulation rely on control flow implemented by oracle circuits, which may account for up to 99% of the total gate count [1] as oracle circuits consist of expensive multi-controlled (MC) quantum operations that formulate the control flow. Existing efforts optimize them by simplifying Boolean expressions associated with MC gates. They merge MC gates, if associated Boolean expressions are adjacent, to reduce the gate cost. Being more aggressive, our work introduces control line encoding (CLE), a technique that even allows merging non-adjacent MC gates by modifying their control (line) polarity. We further develop a plug-in compiler framework that efficiently applies this technique. The framework is grounded in the following observations: 1) Control flows often commute with one another and can be globally reorganized to maximize their merging by CLE; 2) numerous CLE schemes exist to allow gate merge and we can co-design CLE applications to diminish the overhead of CLE itself. Experiments demonstrate that, compared to the baseline, our framework further reduces the CX and T cost, on average by 54.7% and 56.8%, respectively. Anbang Wu, Liqiang Lu, Jianwei Yin, Jingwen Leng, Minyi Guo |
HPCA | 1 |
| 2025 | Vegapunk: Accurate and Fast Decoding for Quantum LDPC Codes with Online Hierarchical Algorithm and Sparse AcceleratorabstractQuantum Low-Density Parity-Check (qLDPC) codes are a promising class of quantum error-correcting codes that exhibit constantrate encoding and high error thresholds, thereby facilitating scalable fault-tolerant quantum computation.However, real-time decoding of qLDPC codes remains a significant challenge due to the high connectivity of their check matrices, which typically requires solving large-scale linear systems with sparse structures.In particular, off-the-shelf qLDPC decoders are often subject to a tradeoff between accuracy and latency, thus yielding no accurate and realtime decoding.This paper presents Vegapunk, a software-hardware co-design framework that enables real-time qLDPC decoding with high accuracy.To improve decoding accuracy, we design an offline decoupling strategy leveraging Satisfiability Modulo Theories (SMT) optimizations to mitigate quantum degeneracy.To enable fast decoding, we introduce an online hierarchical decoding algorithm employing a greedy strategy.Furthermore, we show that our SMT-optimized strategy suffices to produce decoupled matrices with maximized sparsity, thus admitting a dedicated accelerator to fully exploit the sparsity and parallelism to achieve real-time qLDPC decoding.Experimental results demonstrate that Vegapunk enables real-time decoding (< 1𝜇𝑠) for the Bivariate Bicycle (BB) code up to [[784,24,24]] while exhibiting logical error rates on par with the state-of-the-art decoder, i.e., BP+OSD. Kaiwen Zhou 0003, Liqiang Lu, Debin Xiang, Chenning Tao, Anbang Wu, Jingwen Leng, Fangxin Liu, Mingshuai Chen, Jianwei Yin |
MICRO | 5 |
| 2024 | MECH: Multi-Entry Communication Highway for Superconducting Quantum ChipletsabstractChiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits would become a more severe bottleneck due to the long routing distances. In this paper, we propose a multi-entry communication highway (MECH) mechanism to trade ancillary qubits for program concurrency, and build a compilation framework to efficiently manage and utilize the highway resources. Our evaluation shows that this framework significantly outperforms the baseline approach in both the circuit depth and the number of operations on typical quantum benchmarks. This implies a more efficient and less error-prone compilation of quantum programs. Hezi Zhang, Keyi Yin, Anbang Wu, Hassan Shapourian, Alireza Shabani, Yufei Ding 0001 |
ASPLOS (2) | 3 |
| 2023 | OneQ: A Compilation Framework for Photonic One-Way Quantum ComputationabstractIn this paper, we propose OneQ, the first optimizing compilation framework for one-way quantum computation towards realistic photonic quantum architectures. Unlike previous compilation efforts for solid-state qubit technologies, our innovative framework addresses a unique set of challenges in photonic quantum computing. Specifically, this includes the dynamic generation of qubits over time, the need to perform all computation through measurements instead of relying on 1-qubit and 2-qubit gates, and the fact that photons are instantaneously destroyed after measurements. As pioneers in this field, we demonstrate the vast optimization potential of photonic one-way quantum computing, showcasing the remarkable ability of OneQ to reduce computing resource requirements by orders of magnitude. Hezi Zhang, Anbang Wu, Gushu Li, Hassan Shapourian, Alireza Shabani, Yufei Ding 0001 |
ISCA | 2 |
| 2023 | QuComm: Optimizing Collective Communication for Distributed Quantum ComputingabstractDistributed quantum computing (DQC) is a scalable way to build a large-scale quantum computing system. Previous compilers for DQC focus on either qubit-to-qubit inter-node gates or qubit-to-node nonlocal circuit blocks, missing opportunities of optimizing collective communication which consists of nonlocal gates over multiple nodes. In this paper, we observe that by utilizing patterns of collective communication, we can greatly reduce the amount of inter-node communication required to implement a group of nonlocal gates. We propose QuComm, the first compiler framework which unveils and analyzes collective communication patterns hidden in distributed quantum programs and efficiently routes inter-node gates on any DQC architecture based on discovered patterns, cutting down the overall communication cost of the target program. We also provide the first formalization of the communication buffer concept in DQC compiling. The communication buffer utilizes data qubits to store remote entanglement so that we can ensure enough communication resources on any DQC architecture to support the proposed optimizations for collective communication. Experimental results show that, compared to the state-of-the-art baseline, QuComm reduces the amount of inter-node communication by 54.9% on average, over various distributed quantum programs and DQC hardware configurations. Anbang Wu, Yufei Ding 0001, Ang Li 0006 |
MICRO | 1 |
| 2022 | Paulihedral: a generalized block-wise compiler optimization framework for Quantum simulation kernelsabstractThe quantum simulation kernel is an important subroutine appearing as a very long gate sequence in many quantum programs. In this paper, we propose Paulihedral, a block-wise compiler framework that can deeply optimize this subroutine by exploiting high-level program structure and optimization opportunities. Paulihedral first employs a new Pauli intermediate representation that can maintain the high-level semantics and constraints in quantum simulation kernels. This naturally enables new large-scale optimizations that are hard to implement at the low gate-level. In particular, we propose two technology-independent instruction scheduling passes, and two technology-dependent code optimization passes which reconcile the circuit synthesis, gate cancellation, and qubit mapping stages of the compiler. Experimental results show that Paulihedral can outperform state-of-the-art compiler infrastructures in a wide-range of applications on both near-term superconducting quantum processors and future fault-tolerant quantum computers. Gushu Li, Anbang Wu, Yunong Shi, Ali Javadi-Abhari, Yufei Ding 0001, Yuan Xie 0001 |
ASPLOS | 2 |
| 2022 | A synthesis framework for stitching surface code with superconducting quantum devicesabstractQuantum error correction (QEC) is the central building block of fault-tolerant quantum computation but the design of QEC codes may not always match the underlying hardware. To tackle the discrepancy between the quantum hardware and QEC codes, we propose a synthesis framework that can implement and optimize the surface code onto superconducting quantum architectures. In particular, we divide the surface code synthesis into three key subroutines. The first two optimize the mapping of data qubits and ancillary qubits including syndrome qubits on the connectivity-constrained superconducting architecture, while the last subroutine optimizes the surface code execution by rescheduling syndrome measurements. Our experiments on mainstream superconducting architectures demonstrate the effectiveness of the proposed synthesis framework. Especially, the surface codes synthesized by the proposed automatic synthesis framework can achieve comparable or even better error correction capability than manually designed QEC codes. Anbang Wu, Gushu Li, Hezi Zhang, Gian Giacomo Guerreschi, Yufei Ding 0001, Yuan Xie 0001 |
ISCA | 1 |
| 2022 | AutoComm: A Framework for Enabling Efficient Communication in Distributed Quantum ProgramsabstractDistributed quantum computing (DQC) is a promising approach to extending the computational power of near-term quantum hardware. However, the non-local quantum communication between quantum nodes is much more expensive and error-prone than the local quantum operation within each quantum device. Previous DQC compilers focus on optimizing the implementation of each non-local gate and adopt similar compilation designs to single-node quantum compilers. The communication patterns in distributed quantum programs remain unexplored, leading to a far-from-optimal communication cost. In this paper, we identify burst communication, a specific qubit-node communication pattern that widely exists in various distributed quantum programs and can be leveraged to guide communication overhead optimization. We then propose AutoComm, an automatic compiler framework to extract burst communication patterns from input programs and then optimize the communication steps of burst communication discovered. Compared to state-of-the-art DQC compilers, experimental results show that our proposed AutoComm can reduce the communication resource consumption and the program latency by 72.9% and 69.2% on average, respectively. Anbang Wu, Hezi Zhang, Gushu Li, Alireza Shabani, Yuan Xie 0001, Yufei Ding 0001 |
MICRO | 1 |