Low bit-precisions and their bit-slice sparsity have recently been studied to accelerate general matrix-multiplications (GEMM) during large-scale deep neural network (DNN) inferences. While the conventional symmetric quantization facilitates low-resolution processing with bit-slice sparsity for both weight and activation, its accuracy loss caused by the activation’s asymmetric distributions cannot be acceptable, especially for largescale DNNs. In efforts to mitigate this accuracy loss, recent studies have actively utilized asymmetric quantization for activations without requiring additional operations. However, the cuttingedge asymmetric quantization produces numerous nonzero slices that cannot be compressed and skipped by recent bit-slice GEMM accelerators, naturally consuming more processing energy to handle the quantized DNN models.To simultaneously achieve high accuracy and hardware efficiency for large-scale DNN inferences, this paper proposes an Asymmetrically-Quantized bit-Slice GEMM (AQS-GEMM) for the first time. In contrast to the previous bit-slice computing, which only skips operations of zero slices, the AQS-GEMM compresses frequent nonzero slices, generated by asymmetric quantization, and skips their operations. To increase the slicelevel sparsity of activations, we also introduce two algorithm-hardware co-optimization methods: a zero-point manipulation and a distribution-based bit-slicing. To support the proposed AQS-GEMM and optimizations at the hardware-level, we newly introduce a DNN accelerator, Panacea, which efficiently handles sparse/dense workloads of the tiled AQS-GEMM to increase data reuse and utilization. Panacea supports a specialized dataflow and run-length encoding to maximize data reuse and minimize external memory accesses, significantly improving its hardware efficiency. Numerous benchmark evaluations show that Panacea outperforms existing DNN accelerators, e.g., $1.97 \times$ and $3.26 \times$ higher energy efficiency, and $1.88 \times$ and $2.41 \times$ higher throughput than the recent bit-slice accelerator Sibia and the SIMD design, respectively, on OPT-2.7B, while providing better algorithm performance with asymmetric quantization.

Targeting the real-time arrhythmia diagnosis on resource-limited edge devices, in this paper, we present a lightweight electrocardiogram classification system using event-driven machine learning processing. A self-personalized anomaly detector based on signal processing is newly developed to dynamically update internal decision criteria from each patient's recent electrocardiogram history, that activates the following machine learning model only for the abnormal cases. A Siamese neural network is adopted to identify detailed arrhythmia classes by comparing features from the self-personalized normal data and the current abnormal input, increasing the classification accuracy. We also develop a simple version of our Siamese model to reduce the number of trainable parameters while preserving the end-to-end classification accuracy. Experimental results show that the proposed event-driven system reduces ML model activations by 74% for normal beats, achieving a classification accuracy of 96.9% comparable to leading solutions. Additionally, it consumes three times less energy and achieves 3.6 times faster processing latency compared to cost-aware method on a mobile GPU platform, enabling extended battery life and real-time analysis on edge devices.