Demo Data from SIGIR 2026 / reviewers in the wild / expert
Zabihollah Ahmadpour
dblp:320/5887
· DBLP profile ↗
2ranked-venue papers
2as first author
2since 2021 · last 2024
0000-0002-4263-2052ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Theory of computation · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
1 paper |
Cryptographic primitives and cryptanalysis · 83% Hardware security and side channels · 17% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Cryptographic primitives and cryptanalysis › public-key cryptography
modular multiplication |
0.6 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Cryptographic primitives and cryptanalysis › public-key cryptography › modular multiplication
montgomery multiplication |
0.6 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Cryptographic primitives and cryptanalysis
public-key cryptography |
0.6 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Integrated circuit design
digital circuit design |
0.6 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Integrated circuit design
residue number system arithmetic |
0.6 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Hardware security and side channels › side-channel countermeasures
differential power analysis resistance |
0.2 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
Hardware security and side channels
side-channel countermeasures |
0.2 | 1 | 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels · IEEE Trans. Computers 2022 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Montgomery Modular Multiplication via Single-Base Residue Number Systems
Zabihollah Ahmadpour, Ghassem Jaberipur, Jeong-A Lee |
ARITH | 1 |
| 2022 | Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue ChannelsabstractHardware realization of public-key cryptosystems often entails Montgomery modular multiplication (MMM), which is more efficient in residue number systems (RNS). A large pool of co-prime moduli allows for higher number of dynamically changeable moduli-set pairs for the required base extension, leading to ultra-wide key-lengths to accommodate the indispensable resistance to differential power-analysis (DPA) attacks. The moduli are often of the form 2^r-, where r denotes the width of residue channels. In a previous relevant RNS MMM design, with r=64, probability of a successful DPA attack is less than 2^(-66), where efficient arithmetic is obtained only for a limited set of moduli that are insufficient for key-lengths over 1024 bits. Here we propose a free- RNS MMM scheme, for up-to 8192-bit key-lengths and fast 16-bit residue channels, based on the proposed -independent modulo-(2^r-) adders and multipliers. Moreover, we propose an especial method for moduli selection that is required for base extension, leading to the same aforementioned DPA-resistance measure and much lower measures for key-lengths over 1024. The implementation results show 82%,69%,44% less RSA delay, for key-lengths 512,1024,2048, respectively of the home designs versus the 512-bit main reference design, and more than 5%,100% for 4096,8192 key-lengths, respectively, all per 512-bit encrypted messages. Zabihollah Ahmadpour, Ghassem Jaberipur |
IEEE Trans. Computers | 1 |