Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Sander Wiebing

dblp:334/0589 · DBLP profile ↗
← Back
3ranked-venue papers
2as first author
3since 2021 · last 2025
0009-0005-5023-3990ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 3 · 2 first-author · 3 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
3 papers
Hardware security and side channels · 76% Systems and software security · 24%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 79% Memory systems · 21%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels › microarchitectural attacks
transient execution attack
1.622025
Training Solo: On the Limitations of Domain Isolation Against Spectre-v2 Attacks · SP 2025
Leaky Address Masking: Exploiting Unmasked Spectre Gadgets with Noncanonical Address Translation · SP 2024
Processor architecture and microarchitecture
branch prediction
0.912025
Training Solo: On the Limitations of Domain Isolation Against Spectre-v2 Attacks · SP 2025
Systems and software security › vulnerability analysis
attack surface analysis
0.812024
InSpectre Gadget: Inspecting the Residual Attack Surface of Cross-privilege Spectre v2 · USENIX Security Symposium 2024
Hardware security and side channels › microarchitectural attacks › transient execution attack › speculative execution attack
spectre
0.812024
Leaky Address Masking: Exploiting Unmasked Spectre Gadgets with Noncanonical Address Translation · SP 2024
Hardware security and side channels › microarchitectural attacks › transient execution attack
speculative execution attack
0.812024
InSpectre Gadget: Inspecting the Residual Attack Surface of Cross-privilege Spectre v2 · USENIX Security Symposium 2024
Operating systems › system security › operating system security
kernel security
0.312025
Training Solo: On the Limitations of Domain Isolation Against Spectre-v2 Attacks · SP 2025
Systems and software security
vulnerability discovery
0.212024
InSpectre Gadget: Inspecting the Residual Attack Surface of Cross-privilege Spectre v2 · USENIX Security Symposium 2024
Memory systems › memory management › virtual memory
address translation
0.212024
Leaky Address Masking: Exploiting Unmasked Spectre Gadgets with Noncanonical Address Translation · SP 2024

Methods — techniques the papers use, named apart from their topics

spectre-v2 · 2.6domain isolation analysis · 2.6covert channel · 1.5TLB exploitation · 1.5BHI variant · 1.5
YearPublicationVenuePosition
2025 Training Solo: On the Limitations of Domain Isolation Against Spectre-v2 Attacks
abstract
Spectre-v2 vulnerabilities have been increasingly gaining momentum, as they enable particularly powerful cross-domain transient execution attacks. Attackers can train the indirect branch predictor in one protection domain (e.g., user process) in order to speculatively hijack control flow and disclose data in a victim domain (e.g., kernel). In response to these attacks, vendors have deployed increasingly strong domain isolation techniques (e.g., eIBRS and IBPB) to prevent the predictor in one domain from being influenced by another domain's execution. While recent attacks such as BHI and Post-barrier Spectre have evidenced (now patched) implementation flaws of such techniques, the common assumption is that, barring implementation issues, domain isolation can close the attack surface in the practical cases of interest. In this paper, we challenge this assumption and show that even perfect domain isolation is insufficient to deter practical attacks. To this end, we systematically analyze self-training Spectre-v2 attacks, where both training and speculative control-flow hijacking occur in the same (victim) domain. While self-training attacks are believed to be limited to the in-domain scenario–where attackers can run arbitrary code and inject their own disclosure gadgets in a (default-off) sandbox such as eBPF–our analysis shows cross-domain variants are possible in practice. Specifically, we describe three new classes of attacks against the Linux kernel and present two end-to-end exploits that leak kernel memory on recent Intel CPUs at up to 17 KB/sec. During our investigation, we also stumbled upon two Intel issues which completely break (user, guest, and hypervisor) isolation and re-enable classic Spectre-v2 attacks.
Sander Wiebing, Cristiano Giuffrida
SP1
2024 Leaky Address Masking: Exploiting Unmasked Spectre Gadgets with Noncanonical Address Translation
abstract
Linear Address Masking (LAM) is a recently announced Intel feature that enables the CPU to mask off some upper bits before dereferencing a 64-bit pointer. The key idea behind LAM (as well as the similar Upper Address Ignore or UAI from AMD), is to allow software to efficiently make use of untranslated bits of 64-bit linear addresses for metadata. The assumption is that, with LAM (or UAI) features enabled, one can implement fast security (e.g., memory safety) checks and ultimately improve security of production systems.In this paper, we challenge this assumption and show that LAM features can actually degrade security in production by dramatically increasing the Spectre attack surface. To support this claim, we present a new Spectre covert channel based on noncanonical address translation and address key challenges to implement it in practice. For instance, we exploit properties of modern TLBs to craft a reliable signal and LAM features to (crucially) bypass canonicality checks. Moreover, we show that, unlike classic Spectre covert channels, ours unlocks generic (or unmasked) Spectre gadgets encoding high-entropy secrets as dereferenced pointers. Unlike classic (or masked) gadgets, we show the latter escape deployed mitigations and are pervasive in high-value targets such as the Linux kernel. To showcase the new attack surface, we present an end-to-end exploit for Spectre based on LAM (SLAM) targeting upcoming Intel CPUs. We specifically focus on the BHI Spectre variant and show that, despite mitigations believed to eradicate the attack surface, our exploit can abuse a variety of gadgets in the latest Linux kernel and leak the root password hash within minutes from kernel memory. We conclude by evaluating mitigations.
Mathé Hertogh, Sander Wiebing, Cristiano Giuffrida
SP2
2024 InSpectre Gadget: Inspecting the Residual Attack Surface of Cross-privilege Spectre v2
Sander Wiebing, Alvise de Faveri Tron, Herbert Bos, Cristiano Giuffrida
USENIX Security Symposium1