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Thilanka Thilakasiri

dblp:339/0599 · DBLP profile ↗
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4ranked-venue papers
4as first author
4since 2021 · last 2026
0000-0001-9363-3525ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 92% Processor architecture and microarchitecture · 8%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › real-time scheduling
fixed-priority scheduling
0.812024
Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model · RTSS 2024
Embedded and real-time systems › real-time scheduling
limited preemptive scheduling
0.812024
Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model · RTSS 2024
Embedded and real-time systems
real-time scheduling
0.812024
Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model · RTSS 2024
Processor architecture and microarchitecture
chip multiprocessor
0.212024
Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model · RTSS 2024
Embedded and real-time systems › real-time scheduling › multiprocessor scheduling
partitioned scheduling
0.212024
Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model · RTSS 2024

Methods — techniques the papers use, named apart from their topics

schedulability analysis · 0.8
YearPublicationVenuePosition
2026 Preemption Threshold Assignment to Improve Schedulability under Memory Constraints
Thilanka Thilakasiri, Matthias Becker 0004
DATE1
2024 Work-in-Progress: Exploring Limited Preemption Approaches for the Phased Execution Model
abstract
Phased execution models separate computation from access to shared resources to make task execution predictable. These task models minimize interference between tasks, making them suitable for modern complex multi-core platforms. In the phased execution model, tasks perform computations only using the local memory to avoid accessing the shared memory during task execution. All instructions and data, including the intermediate results, are stored in the local memory during execution. Thus, the local memory size becomes a crucial factor in contrast to conventional execution. In the literature, non-preemptive and fully preemptive execution of phased execution models are studied. While the non-preemptive approaches utilize the local memory well, schedulability is reduced due to blocking. On the other hand, fully preemptive execution phases allow for better schedulability but require significantly more local memory capacity to implement preemptions at runtime without violating the model’s execution semantics. Thus, this work evaluates different approaches to limited preemptive scheduling of the phased execution model under partitioned fixed-priority scheduling. We demonstrate that preemption thresholds and non-preemptive regions can successfully be used to satisfy both timing and memory constraints of phased tasks.
Thilanka Thilakasiri, Matthias Becker 0004
RTSS1
2023 An Exact Schedulability Analysis for Global Fixed-Priority Scheduling of the AER Task Model
abstract
Commercial off-the-shelf (COTS) multi-core platforms offer high performance and large availability of processing resources. Increased contention when accessing shared resources is a result of the high parallelism and one of the main challenges when realtime applications are deployed to these platforms. As a result, several execution models have been proposed to avoid contention by separating access to shared resources from execution.
Thilanka Thilakasiri, Matthias Becker 0004
ASP-DAC1
2023 Methods to Realize Preemption in Phased Execution Models
abstract
Phased execution models are a good solution to tame the increased complexity and contention of commercial off-the-shelf (COTS) multi-core platforms, e.g., Acquisition-Execution-Restitution (AER) model, PRedictable Execution Model (PREM). Such models separate execution from access to shared resources on the platform to minimize contention. All data and instructions needed during an execution phase are copied into the local memory of the core before starting to execute. Phased execution models are generally used with non-preemptive scheduling to increase predictability. However, the blocking time in non-preemptive systems can reduce schedulability. Therefore, an investigation of preemption methods for phased execution models is warranted. Although, preemption for phased execution models must be carefully designed to retain its execution semantics, i.e., the handling of local memory during preemption becomes non-trivial. This paper investigates different methods to realize preemption in phased execution models while preserving their semantics. To the best of our knowledge, this is the first paper to explore different approaches to implement preemption in phased execution models from the perspective of data management. We introduce two strategies to realize preemption of execution phases based on different methods of handling local data of the preempted task. Heuristics are used to create time-triggered schedules for task sets that follow the proposed preemption methods. Additionally, a schedulability-aware preemption heuristic is proposed to reduce the number of preemptions by allowing preemption only when it is beneficial in terms of schedulability. Evaluations on a large number of synthetic task sets are performed to compare the proposed preemption models against each other and against a non-preemptive version. Furthermore, our schedulability-aware preemption heuristic has higher schedulability with a clear margin in all our experiments compared to the non-preemptive and fully-preemptive versions.
Thilanka Thilakasiri, Matthias Becker 0004
ACM Trans. Embed. Comput. Syst.1