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Harold Hoehne

dblp:34/6124 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1975
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 87% Performance modeling and evaluation · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
hardware verification		 0.011975
Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975
Electronic design automation › hardware verification and test › functional verification
RTL verification		 0.011975
Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975
Performance modeling and evaluation › simulation
concurrent simulation		 0.011975
Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975

Methods — techniques the papers use, named apart from their topics

functional-structural comparison · 0.0concurrent simulation · 0.0
YearPublicationVenuePosition
1975 Design Verification at the Register Transfer Language Level
abstract
Computer description languages can be used as input to software tools which aid in the design of digital hardware structures. One of the important phases in the design process is verification. A software system is described which aids the verification process of a computer description at the register transfer language (RTL) leveL. It is based on the concept of concurrent simulation and comparison of the functional and the structural description of a computer. Error types, in particular consistency and semantic errors, and algorithms for their detection are discussed. The tools necessary to implement these detection procedures are outlined.
Harold Hoehne, Robert Piloty
 IEEE Trans. Computers1