Demo Data from SIGIR 2026 / reviewers in the wild / expert
Sayyed Arash Ostadzadeh
dblp:35/2018
· DBLP profile ↗
3ranked-venue papers
2as first author
0since 2021 · last 2013
0000-0003-2039-867XORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 44% Distributed systems · 44% Parallel and multicore computing · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware/software co-design
hardware/software partitioning |
0.1 | 1 | 2009 | A clustering framework for task partitioning based on function-level data usage analysis · FPGA 2009 |
Distributed systems
task clustering |
0.1 | 1 | 2009 | A clustering framework for task partitioning based on function-level data usage analysis · FPGA 2009 |
Parallel and multicore computing
task partitioning |
0.0 | 1 | 2009 | A clustering framework for task partitioning based on function-level data usage analysis · FPGA 2009 |
Methods — techniques the papers use, named apart from their topics
dynamic profiling · 0.1clustering algorithm · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2013 | Quipu: A Statistical Model for Predicting Hardware ResourcesabstractThere has been a steady increase in the utilization of heterogeneous architectures to tackle the growing need for computing performance and low-power systems. The execution of computation-intensive functions on specialized hardware enables to achieve substantial speedups and power savings. However, with a large legacy code base and software engineering experts, it is not at all obvious how to easily utilize these new architectures. As a result, there is a need for comprehensive tool support to bridge the knowledge gap of many engineers as well as to retarget legacy code. In this article, we present the Quipu modeling approach, which consists of a set of tools and a modeling methodology that can generate hardware estimation models, which provide valuable information for developers. This information helps to focus their efforts, to partition their application, and to select the right heterogeneous components. We present Quipu ’s capability to generate domain-specific models, that are up to several times more accurate within their particular domain (error: 4.6%) as compared to domain-agnostic models (error: 23%). Finally, we show how Quipu can generate models for a new toolchain and platform within a few days. Roel Meeuws, Sayyed Arash Ostadzadeh, Carlo Galuzzi, Vlad Mihai Sima, Razvan Nane, Koen Bertels |
ACM Trans. Reconfigurable Technol. Syst. | 2 |
| 2009 | A Multipurpose Clustering Algorithm for Task Partitioning in Multicore Reconfigurable SystemsabstractIn recent years, multicore systems have become a dominant architecture, introducing new challenges that need to be addressed in order to take full advantage of their efficiency. Reconfigurable computing has also received a great deal of attention due to its ability to increase the performance of an application through hardware execution, while retaining the flexibility of a software solution. Grouping tasks within an application contributes to coarse-grained partitioning, which can eventually improve the performance of the system. In this paper, we introduce a clustering framework along with a flexible multi-purpose clustering algorithm that initiates task clustering at the functional level based on dynamic profiling information. The clustering framework can be used as the basic step to modify the granularity of tasks in the hardware/software partitioning and scheduling phases. As a result, an elaborate mapping onto the system resources and possibly a higher degree of task parallelism becomes feasible. The framework particularly targets two objectives, 1) to form workload-balanced and 2) loosely-coupled clusters. We evaluated its efficiency using MJPEG as a case study. The experimental results comply with the desired clustering metrics defined through the objectives. Sayyed Arash Ostadzadeh, Roel Meeuws, Kamana Sigdel, Koen Bertels |
CISIS | 1 |
| 2009 | A clustering framework for task partitioning based on function-level data usage analysisabstractRecently, reconfigurable computing has received a great deal of attention due to its ability to increase an application performance with hardware execution, while possessing the flexibility of software solution. One of the major requirements for such systems is to identify which application or part of the application can be implemented as software and which can be mapped onto reconfigurable devices. Grouping the tasks within an application can intensify coarse-grained partitioning of the application, which can eventually improve the performance of the system. In this work, we introduce a clustering framework along with a flexible multipurpose clustering algorithm that initiates task clustering at the functional level based on dynamic profiling information. The clustering framework can be used as the basic step to modify the granularity of tasks in the hardware/software partitioning and scheduling phases. As a result, an elaborate mapping onto the system resources and possibly a higher degree of task parallelism can be obtained. In an initial attempt, the framework addresses two primary objectives to create workload-balanced and loosely-coupled clusters. The experimental results show that the clustering complies with the desired metrics, which were defined through the objectives. Sayyed Arash Ostadzadeh, Roel Meeuws, Kamana Sigdel, Koen Bertels |
FPGA | 1 |