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Pooya Khajeh

dblp:353/2296 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 50% Electronic design automation · 50%
Artificial intelligence
1 paper
Language models and text generation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Natural language and speech › Language models and text generation
design automation
0.712023
Learning to Design Analog Circuits to Meet Threshold Specifications · ICML 2023
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.712023
Learning to Design Analog Circuits to Meet Threshold Specifications · ICML 2023
Electronic design automation
analog circuit design automation
0.712023
Learning to Design Analog Circuits to Meet Threshold Specifications · ICML 2023

Methods — techniques the papers use, named apart from their topics

supervised learning · 1.3simulation data · 1.3
YearPublicationVenuePosition
2023 Learning to Design Analog Circuits to Meet Threshold Specifications
abstract
Automated design of analog and radio-frequency circuits using supervised or reinforcement learning from simulation data has recently been studied as an alternative to manual expert design. It is straightforward for a design agent to learn an inverse function from desired performance metrics to circuit parameters. However, it is more common for a user to have threshold performance criteria rather than an exact target vector of feasible performance measures. In this work, we propose a method for generating from simulation data a dataset on which a system can be trained via supervised learning to design circuits to meet threshold specifications. We moreover perform the to-date most extensive evaluation of automated analog circuit design, including experimenting in a significantly more diverse set of circuits than in prior work, covering linear, nonlinear, and autonomous circuit configurations, and show that our method consistently reaches success rate better than 90% at 5% error margin, while also improving data efficiency by upward of an order of magnitude.
Dmitrii Krylov, Pooya Khajeh, Junhan Ouyang, Thomas Reeves, Tongkai Liu, Hiba Ajmal, Hamidreza Aghasi, Roy Fox
ICML2