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Tengcheng Wang

dblp:357/2962 · DBLP profile ↗
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4ranked-venue papers
1as first author
4since 2021 · last 2024
0009-0008-2172-8435ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author · 4 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
High-performance computing · 50% GPUs and heterogeneous computing · 20% Parallel and multicore computing · 18%

Topics — the 11 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing
scientific computing systems
1.422024
AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024
PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems · SC 2023
High-performance computing › iterative methods
algebraic multigrid
0.812024
AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024
GPUs and heterogeneous computing
GPU computing
0.812024
AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024
GPUs and heterogeneous computing › GPU computing
tensor cores
0.812024
AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024
Parallel and multicore computing › data distribution
block-cyclic distribution
0.712023
PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems · SC 2023
Electronic design automation
circuit simulation
0.712023
Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation · DAC 2023
Parallel and multicore computing › parallelization strategies
distributed-memory parallelization
0.712023
PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems · SC 2023
High-performance computing › sparse linear solver
sparse direct solver
0.712023
PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems · SC 2023
High-performance computing › sparse linear solver
sparse LU factorization
0.712023
Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation · DAC 2023
Processor architecture and microarchitecture › computer arithmetic › floating-point arithmetic
mixed-precision arithmetic
0.212024
AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024
High-performance computing
sparse linear algebra
0.212023
Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation · DAC 2023

Methods — techniques the papers use, named apart from their topics

sparse matrix-vector multiplication · 0.8sparse general matrix-matrix multiplication · 0.8mixed precision · 0.8supernodal method · 0.7multifrontal method · 0.7machine learning · 0.7SpMM · 0.7GEMM · 0.7BLAS · 0.7
YearPublicationVenuePosition
2024 Machine Learning and GPU Accelerated Sparse Linear Solvers for Transistor-Level Circuit Simulation: A Perspective Survey (Invited Paper)
abstract
Sparse linear solvers play a crucial role in transistor-level circuit simulation, especially for large-scale post-layout circuit simulation when considering complex parasitic effects. As semiconductor technology advances rapidly, the increasing sizes of circuits result in sparse linear solvers that require extended execution times and additional memory resources. Consequently, high-performance sparse linear solvers emerge as pivotal tools to facilitate rapid circuit simulation and verification. However, circuit matrices frequently exhibit high sparsity and non-uniform distributions of nonzero elements, compounding the challenge of achieving efficient acceleration. Recently, the flourishing developments in machine learning technology and the continuous enhancement of hardware capabilities have presented new opportunities for accelerating sparse linear solvers. This paper provides a perspective review of these technological advancements, while also highlighting the challenges and future opportunities in this evolving landscape.
Zhou Jin 0001, Wenhao Li 0020, Yinuo Bai 0002, Tengcheng Wang, Yicheng Lu, Weifeng Liu 0002
ASPDAC4
2024 AmgT: Algebraic Multigrid Solver on Tensor Cores
abstract
Algebraic multigrid (AMG) methods are particularly efficient to solve a wide range of sparse linear systems, due to their good flexibility and adaptability. Even though modern parallel devices, such as GPUs, brought massive parallelism to AMG, the latest major hardware features, i.e., tensor core units and their low precision compute power, have not been exploited to accelerate AMG. This paper proposes AmgT, a new AMG solver that utilizes the tensor core and mixed precision ability of the latest GPUs during multiple phases of the AMG algorithm. Considering that the sparse general matrix-matrix multiplication (SpGEMM) and sparse matrix-vector multiplication (SpMV) are extensively used in the setup and solve phases, respectively, we propose a novel method based on a new unified sparse storage format that leverages tensor cores and their variable precision. Our method improves both the performance of GPU kernels, and also reduces the cost of format conversion in the whole data flow of AMG. To better utilize the algorithm components in existing libraries, the data format and compute kernels of the AmgT solver are incorporated into the HYPRE library. The experimental results on NVIDIA A100, H100 and AMD MI210 GPUs show that our AmgT outperforms the original GPU version of HYPRE by a factor of on geomean $1.46 \times, 1.32 \times$ and $2.24 \times$ (up to $2.10 \times, 2.06 \times$ and $3.67 \times$), respectively.
Yuechen Lu, Lijie Zeng, Tengcheng Wang, Xu Fu, Helin Cheng, Dechuang Yang, Zhou Jin 0001, Marc Casas, Weifeng Liu 0002
SC3
2023 Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation
abstract
Sparse LU factorization is considered to be one of the most time-consuming components in circuit simulation, particularly when dealing with circuits of considerable size in the advanced process era. Sparse LU factorization can be expedited by utilizing the supernode structure, which partitions the matrix into dense sub-matrices, thereby improving computational performance by utilizing level-3 Basic Linear Algebra Subprograms (BLAS) General Matrix Multiplication (GEMM) operations. The sparse and irregular structure of circuit matrices often impedes the formation of supernodes or results in the formation of supernodes with many zero elements, which in turn poses challenges for exploiting GEMM operations. In this paper, by fully utilizing the density in sub-matrices and combining GEMM with the Dense-Sparse Matrix Multiplication (SpMM), we propose a density-aware adaptive matrix multiplication equipped with machine learning techniques to optimize performance of the most-time consuming matrix multiplication operator so as to accelerate the sparse LU factorization. Numerical experiment results show that among the 6 circuit matrices tested, the average performance of matrix multiplication in our algorithm can be improved by 5.35x (up to 9.35x) compared to the performance of using GEMM directly in Schur-complement updates. Compared with state-of-the-art solver SuperLU_DIST, our method shows a substantial performance improvement.
Tengcheng Wang, Wenhao Li 0020, Haojie Pei, Yuying Sun, Zhou Jin 0001, Weifeng Liu 0002
DAC1
2023 PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems
abstract
Sparse direct solvers play a vital role in large-scale high performance computing in science and engineering. Existing distributed sparse direct methods employ multifrontal/supernodal patterns to aggregate columns of nearly identical forms and to exploit dense basic linear algebra subprograms (BLAS) for computation. However, such a data layout may bring more unevenness when the structure of the input matrix is not ideal, and using dense BLAS may waste many floating-point operations on zero fill-ins.
Xu Fu, Bingbin Zhang, Tengcheng Wang, Wenhao Li 0020, Yuechen Lu, Enxin Yi, Jianqi Zhao 0001, Xiaohan Geng, Fangying Li, Zhou Jin 0001, Weifeng Liu 0002
SC3