In HV (high-voltage) and HF (high-frequency) applications, SiC (silicon carbide) MOSFET is widely used for its small parasitic characteristics and fast switching speed. Using discrete devices on PCB, the active gate driver is usually adopted to restrict EMI (electromagnetic interference) noise. This method could achieve a limited switching performance improvement, and many disadvantages still exist. In this paper, the integrated adaptive multi-level gate driver is presented to improve the switching performance of SiC MOSFET in HV and HF applications. The proposed gate driver is realized on the chip using critical techniques such as dV/dt noise attenuation, high-speed circuit, and anti-false triggering mechanism. Then, the proposed gate drive is fabricated in a$0.18~\mu \text{m}$BCD process and occupies a 4.16 mm2 active area. The experimental results show that SiC MOSFET can achieve a 200 ns switching time, 0.8 mJ energy losses, no more than 15 V/ns average dV/dt noises, and 1.5 A/ns average di/dt noises under a 600 V power supply and a 33 A load. SiC MOSFET can also realize the excellent switching performance at different load currents from 15 A to 90 A by using the proposed adaptive multi-level gate driver.

This paper presents a mechanical reliability study of 3-dB waveguide hybrid couplers in submillimeter and terahertz bands. To show the necessity of improving the mechanical properties of the coupler’s branch in submillimeter and terahertz bands, a comprehensive study regarding the displacement of hybrid branch variation with varying width-length ratio and height-length ratio has been completed. In addition, a modified 3-dB waveguide hybrid coupler is designed and presented. Compared with the traditional branch structure, the proposed hybrid consists of a modified middle branch with circular cutouts at the top and bottom on both sides instead of the traditional rectangle branch, which increases the branch size and improves its mechanical reliability while achieving the same performance. Simulation results show that the deformation of the modified hybrid branch is 22% less than those of other traditional structure designs under the same stress. In practice, a vibration experiment is set up to verify the mechanical reliability of hybrid couplers. Measurement results show that the experiment deteriorates the coupling performance. Experimental results verify that the performance of the novel structure coupler is better than that of a traditional structure branch hybrid coupler under the same electrical properties.

A fast-transient, current-efficient low-dropout regulator (LDO) with super transconductance cell (STC) is proposed in this paper. By adopting advanced current amplifier (CA) and dynamic biasing (DB) techniques for the error amplifier (EA), the feedback loop bandwidth can be significantly extended without increasing much quiescent power, which reduces output voltage spikes and response time greatly. Moreover, dynamic reference control (DRC) with robust loop stability is embedded in the LDO to adaptively adjust voltage reference during transient so as to further enhance the slew rate of EA, realizing significant enhancement for the transient performances. This circuit has been implemented in a 0.35μm CMOS process and occupies an active chip area of 456×278 μm2. Experimental results show that it is able to provide 100mA load current at 200mV dropout voltage, with current efficiency of 99.88%. The output voltage spike under maximum load current change in 20ns edge time is less than 11.2mV with a 0.054μs response time. The power-supply rejection (PSR) at 100kHz is -75.6dB.