The authors describe the design and implementation of an algorithm and a processor which can be used to accelerate computations in which large amounts of rotations (circular as well as hyperbolic) are involved. The processor is a low-cost high-throughput VLSI implementation of the algorithm. With 10/sup 7/ rotations per second, many real-time and interaction-time applications in scientific computation become feasible. The required storage and/or silicon area is low and the execution time is independent of the particular operation performed. Another feature of this CORDIC design is its pipelined architecture and floating point extension. It is angle-pipelinable at the bit-level and has an execution time which is independent of any possible operation that can be executed.>

A number of high-speed multiprocessor applications of a fast custom VLSI floating-point pipeline CORDIC processor are presented. The applications are concerned with speech processing, matrix arithmetic, antenna array processing, and computer graphics. The applications are designed using an interactive high-level functional design environment for multiprocessor systems and are implemented on a test bed for high-speed parallel processor arrays.>

A new applicative model is presented for the description and analysis of both synchronous and asynchronous VLSI networks at the top levels of abstraction.The model is based on two powerful paradigms, the Applicative State Transition concept of Backus [l] for the descriptive aspects and the theory of single token time(d) Petri Nets [2, 3, 41 for the communicative aspects