Demo Data from SIGIR 2026 / reviewers in the wild / expert
Vasilis Kypriotis
dblp:377/3418
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2026
0009-0005-9732-3360ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 58% GPUs and heterogeneous computing · 33% Reconfigurable computing and FPGAs · 9% | |
| Artificial intelligence
1 paper |
Efficient and distributed learning · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Operating systems · 100% |
Topics — the 4 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
GPUs and heterogeneous computing
GPU resource management |
0.9 | 1 | 2025 | LithOS: An Operating System for Efficient Machine Learning on GPUs · SOSP 2025 |
Electronic design automation
design space exploration |
0.8 | 1 | 2024 | Data-driven HLS optimization for reconfigurable accelerators · DAC 2024 |
Electronic design automation
high-level synthesis |
0.8 | 1 | 2024 | Data-driven HLS optimization for reconfigurable accelerators · DAC 2024 |
Reconfigurable computing and FPGAs
FPGA accelerator |
0.2 | 1 | 2024 | Data-driven HLS optimization for reconfigurable accelerators · DAC 2024 |
Methods — techniques the papers use, named apart from their topics
knowledge-based optimization · 0.8data-driven optimization · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | PowerWeave: Unlocking Energy-Efficient ML on GPUs with OS-Level Spatial Power Management
Vasilis Kypriotis, Eric Dubberstein, Patrick H. Coppock, Eliot H. Solomon, Rayyan Zamir, Tathagata Srimani, Dimitrios Skarlatos 0002 |
ISCA | 1 |
| 2025 | LithOS: An Operating System for Efficient Machine Learning on GPUsabstractThe rapid growth of machine learning (ML) has made GPUs indispensable in datacenters and underscores the urgency of improving their efficiency. However, balancing diverse model demands with high utilization remains a fundamental challenge. Transparent, fine-grained GPU resource management that maximizes utilization, energy efficiency, and isolation requires an OS approach. This paper introduces LithOS, a first step towards a GPU OS. Patrick H. Coppock, Eliot H. Solomon, Vasilis Kypriotis, Leon Yang, Bikash Sharma, Dan Schatzberg, Todd C. Mowry, Dimitrios Skarlatos 0002 |
SOSP | 4 |
| 2024 | Data-driven HLS optimization for reconfigurable acceleratorsabstractHigh-Level Synthesis (HLS) has played a pivotal role in making FPGAs accessible to a broader audience by facilitating high-level device programming and rapid microarchitecture customization through the use of directives. However, manually selecting the right directives can be a formidable challenge for programmers lacking a hardware background. This paper introduces an ultra-fast, knowledge-based HLS design optimization method that automatically extracts and applies the most promising directive configurations to the original source code. This optimization approach is entirely data-driven, offering a generalized HLS tuning solution without reliance on Quality of Result (QoR) models or meta-heuristics. We design, implement, and evaluate our methodology using over 100 applications sourced from well-established benchmark suites and GitHub repositories, all running on a Xilinx ZCU104 FPGA. The results are promising, including an average geometric mean speedup of ×7.2 and ×1.35 compared to designer-optimized designs and resource over-provisioning strategies, respectively. Additionally, it demonstrates a high design feasibility score and maintains an average inference latency of 38ms. Comparative analysis with traditional genetic algorithm-based Design Space Exploration (DSE) methods and State-of-the-Art (SoA) approaches reveals that it produces designs of similar quality but at speeds 2-3 orders of magnitude faster. This suggests that it is a highly promising solution for ultra-fast and automated HLS optimization. Aggelos Ferikoglou, Andreas Kosmas Kakolyris, Vasilis Kypriotis, Dimosthenis Masouros, Dimitrios Soudris, Sotirios Xydis |
DAC | 3 |