Demo Data from SIGIR 2026 / reviewers in the wild / expert
Jon Purdy
dblp:38/4650
· DBLP profile ↗
3ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2Systems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 67% Processor architecture and microarchitecture · 33% | |
| Artificial intelligence
1 paper |
Deep learning architectures and training · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
dataflow architecture |
0.4 | 1 | 2020 | Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning Workloads · ISCA 2020 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.4 | 1 | 2020 | Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning Workloads · ISCA 2020 |
Hardware accelerators and domain-specific architectures › tensor accelerator
tensor streaming processor |
0.4 | 1 | 2020 | Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning Workloads · ISCA 2020 |
Methods — techniques the papers use, named apart from their topics
producer-consumer stream programming · 0.9dataflow locality · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning WorkloadsabstractIn this paper, we introduce the Tensor Streaming Processor (TSP) architecture, a functionally-sliced microarchitecture with memory units interleaved with vector and matrix deep learning functional units in order to take advantage of dataflow locality of deep learning operations. The TSP is built based on two key observations: (1) machine learning workloads exhibit abundant data parallelism, which can be readily mapped to tensors in hardware, and (2) a simple and deterministic processor with producer-consumer stream programming model enables precise reasoning and control of hardware components, achieving good performance and power efficiency. The TSP is designed to exploit parallelism inherent in machine-learning workloads including instruction-level, memory concurrency, data and model parallelism, while guaranteeing determinism by eliminating all reactive elements in the hardware (e.g. arbiters, and caches). Early ResNet50 image classification results demonstrate 20.4K processed images per second (IPS) with a batch-size of one— a $4 \times$ improvement compared to other modern GPUs and accelerators [44]. Our first ASIC implementation of the TSP architecture yields a computational density of more than 1 TeraOp/s per square mm of silicon for its $25 \times 29$ mm 14nm chip operating at a nominal clock frequency of 900 MHz. The TSP demonstrates a novel hardware-software approach to achieve fast, yet predictable, performance on machine-learning workloads within a desired power envelope. Dennis Abts, Jonathan Ross, Jonathan Sparling, Mark Wong-VanHaren, Max Baker, Tom Hawkins, Temesghen Kahsai, Garrin Kimmell, Jennifer Hwang, Rebekah Leslie-Hurd, Michael Bye, E. R. Creswick, Matthew Boyd, Mahitha Venigalla, Evan Laforge, Jon Purdy, Purushotham Kamath, Dinesh Maheshwari, Michael Beidler, Geert Rosseel, Omar Ahmad, Gleb Gagarin, Richard Czekalski, Ashay Rane, Sahil Parmar, Jeff Werner, Jim Sproch, Adrián Macías, Brian Kurtz |
ISCA | 18 |
| 2015 | Parameterized Shape Grammar for n-fold Generating Islamic Geometric MotifsabstractThe complex formation of Islamic geometric Patterns (IGP) is one of the distinctive features in Islamic art and architecture. Many have attempted to reproduce these patterns in digital form, using various pattern generation techniques. Shape grammars are an effective pattern generation method, providing good aesthetic results. In this paper we present a novel approach in generating 3D IGP using an extended shape grammar: Parametrized Shape Grammar (PSG). PSG allows a user to generate both original and novel forms of Islamic geometric motifs (a repeated unit of a pattern). PSG is generalized to generate n-fold Islamic geometric motifs in a 3D environment, practically implemented as a 3D modeling tool within Autodesk Maya. The parametrization within each grammar rule is the key to generating numerous original and novel Islamic geometric motifs. Zahra Sayed, Hassan Ugail, Ian J. Palmer, Jon Purdy, Carlton Reeve |
CW | 4 |
| 2014 | There is no fork: an abstraction for efficient, concurrent, and concise data accessabstractWe describe a new programming idiom for concurrency, based on Applicative Functors, where concurrency is implicit in the Applicative <*> operator. The result is that concurrent programs can be written in a natural applicative style, and they retain a high degree of clarity and modularity while executing with maximal concurrency. This idiom is particularly useful for programming against external data sources, where the application code is written without the use of explicit concurrency constructs, while the implementation is able to batch together multiple requests for data from the same source, and fetch data from multiple sources concurrently. Our abstraction uses a cache to ensure that multiple requests for the same data return the same result, which frees the programmer from having to arrange to fetch data only once, which in turn leads to greater modularity. Simon Marlow, Louis Brandy, Jonathan Coens, Jon Purdy |
ICFP | 4 |