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Yo-Ga Chen

dblp:391/2120 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0003-0498-7287ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 67% Electronic design automation · 33%
Theoretical computer science
1 paper
Automata and formal languages · 77% Automated reasoning and model checking · 23%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › formal verification
parameterized verification
0.912025
Verifying Quantum Circuits with Level-Synchronized Tree Automata · Proc. ACM Program. Lang. 2025
Emerging computing paradigms › quantum computer architecture
quantum circuit verification
0.912025
Verifying Quantum Circuits with Level-Synchronized Tree Automata · Proc. ACM Program. Lang. 2025
Emerging computing paradigms
quantum computer architecture
0.912025
Verifying Quantum Circuits with Level-Synchronized Tree Automata · Proc. ACM Program. Lang. 2025
Automata and formal languages
tree automata
0.912025
Verifying Quantum Circuits with Level-Synchronized Tree Automata · Proc. ACM Program. Lang. 2025
Automated reasoning and model checking
symbolic verification
0.312025
Verifying Quantum Circuits with Level-Synchronized Tree Automata · Proc. ACM Program. Lang. 2025

Methods — techniques the papers use, named apart from their topics

symbolic representation · 1.7level-synchronized tree automata · 1.7
YearPublicationVenuePosition
2025 Verifying Quantum Circuits with Level-Synchronized Tree Automata
abstract
We present a new method for the verification of quantum circuits based on a novel symbolic representation of sets of quantum states using level-synchronized tree automata (LSTAs). LSTAs extend classical tree automata by labeling each transition with a set of choices , which are then used to synchronize subtrees of an accepted tree. Compared to the traditional tree automata, LSTAs have an incomparable expressive power while maintaining important properties, such as closure under union and intersection, and decidable language emptiness and inclusion. We have developed an efficient and fully automated symbolic verification algorithm for quantum circuits based on LSTAs. The complexity of supported gate operations is at most quadratic, dramatically improving the exponential worst-case complexity of an earlier tree automata-based approach. Furthermore, we show that LSTAs are a promising model for parameterized verification , i.e., verifying the correctness of families of circuits with the same structure for any number of qubits involved, which principally lies beyond the capabilities of previous automated approaches.We implemented this method as a C++ tool and compared it with three symbolic quantum circuit verifiers and two simulators on several benchmark examples. The results show that our approach can solve problems with sizes orders of magnitude larger than the state of the art.
Parosh Aziz Abdulla, Yo-Ga Chen, Yu-Fang Chen 0001, Lukás Holík, Ondrej Lengál, Jyun-Ao Lin, Fang-Yi Lo, Wei-Lun Tsai
Proc. ACM Program. Lang.2