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Alexei D. Sadovnikov

dblp:40/3394 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 74% Electronic design automation · 26%
Theoretical computer science
1 paper
Mathematical optimization · 100%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.021996
Extraction of SPICE BJT model parameters in BIPOLE3 using optimization methods · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Quasi-three-dimensional modeling of bipolar transistor characteristics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Integrated circuit design › analog and mixed-signal circuits › device modeling
bipolar transistor modeling
0.021996
Extraction of SPICE BJT model parameters in BIPOLE3 using optimization methods · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Quasi-three-dimensional modeling of bipolar transistor characteristics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › circuit simulation
device and circuit simulation
0.011996
Extraction of SPICE BJT model parameters in BIPOLE3 using optimization methods · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › technology computer-aided design
device simulation
0.011993
Quasi-three-dimensional modeling of bipolar transistor characteristics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993

Methods — techniques the papers use, named apart from their topics

optimization methods · 0.0BIPOLE3 simulator · 0.0quasi-three-dimensional modeling · 0.0RBCALC · 0.0BIPOLE · 0.0
YearPublicationVenuePosition
1996 Extraction of SPICE BJT model parameters in BIPOLE3 using optimization methods
abstract
We present a method for SPICE model parameter extraction for a bipolar transistor in the active and quasisaturation modes. It uses the capabilities of the BIPOLE3 simulator to enhance the optimization procedure. Comparisons are made between the Gummel-Poon, the VBIC95, and the SGS-Thomson Microelectronics SPICE model results for I/sub C/(V/sub BE/), I/sub B/(V/sub BE/), /spl beta/(I/sub C/), f/sub T/(I/sub C/), and I/sub C/(V/sub CE/) characteristics.
Alexei D. Sadovnikov, David J. Roulston, D. Celi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1993 Quasi-three-dimensional modeling of bipolar transistor characteristics
abstract
A new approach to modeling the characteristics of a real three-dimensional bipolar transistor (BJT) is presented. It is based on the joint use of the BIPOLE program for calculating the intrinsic and emitter sidewall BJT characteristics and a special code RBCALC for calculating the two-dimensional potential distribution in the base region. The results presented show the importance of accounting for the third dimension for accurate calculation of some important BJT characteristics.>
Alexei D. Sadovnikov, David J. Roulston
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1