Demo Data from SIGIR 2026 / reviewers in the wild / expert
Yasuhiko Ogata
dblp:42/4533
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2008
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 56% GPUs and heterogeneous computing · 44% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing › fast fourier transform
3D FFT |
0.1 | 1 | 2008 | Bandwidth intensive 3-D FFT kernel for GPUs using CUDA · SC 2008 |
GPUs and heterogeneous computing
GPU computing |
0.1 | 1 | 2008 | Bandwidth intensive 3-D FFT kernel for GPUs using CUDA · SC 2008 |
High-performance computing
scientific computing systems |
0.0 | 1 | 2008 | Bandwidth intensive 3-D FFT kernel for GPUs using CUDA · SC 2008 |
Methods — techniques the papers use, named apart from their topics
thread and register optimization · 0.1stride memory access avoidance · 0.1shared memory utilization · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2008 | An efficient, model-based CPU-GPU heterogeneous FFT libraryabstractGeneral-Purpose computing on Graphics Processing Units (GPGPU) is becoming popular in HPC because of its high peak performance. However, in spite of the potential performance improvements as well as recent promising results in scientific computing applications, its real performance is not necessarily higher than that of the current high-performance CPUs, especially with recent trends towards increasing the number of cores on a single die. This is because the GPU performance can be severely limited by such restrictions as memory size and bandwidth and programming using graphics-specific APIs. To overcome this problem, we propose a model-based, adaptive library for 2D FFT that automatically achieves optimal performance using available heterogeneous CPU-GPU computing resources. To find optimal load distribution ratios between CPUs and GPUs, we construct a performance model that captures the respective contributions of CPU vs. GPU, and predicts the total execution time of 2D-FFT for arbitrary problem sizes and load distribution. The performance model divides the FFT computation into several small sub steps, and predicts the execution time of each step using profiling results. Preliminary evaluation with our prototype shows that the performance model can predict the execution time of problem sizes that are 16 times as large as the profile runs with less than 20% error, and that the predicted optimal load distribution ratios have less than 1% error. We show that the resulting performance improvement using both CPUs and GPUs can be as high as 50% compared to using either a CPU core or a GPU. Yasuhiko Ogata, Toshio Endo, Naoya Maruyama, Satoshi Matsuoka |
IPDPS | 1 |
| 2008 | Bandwidth intensive 3-D FFT kernel for GPUs using CUDAabstractMost GPU performance “hypes” have focused around tightly-coupled applications with small memory bandwidth requirements e.g., N-body, but GPUs are also commodity vector machines sporting substantial memory bandwidth; however, effective programming methodologies thereof have been poorly studied. Our new 3-D FFT kernel, written in NVIDIA CUDA, achieves nearly 80 GFLOPS on a top-end GPU, being more than three times faster than any existing FFT implementations on GPUs including CUFFT. Careful programming techniques are employed to fully exploit modern GPU hardware characteristics while overcoming their limitations, including on-chip shared memory utilization, optimizing the number of threads and registers through appropriate localization, and avoiding low-speed stride memory accesses. Our kernel applied to real applications achieves orders of magnitude boost in power&cost vs. performance metrics. The off-card bandwidth limitation is still an issue, which could be alleviated somewhat with application kernels confinement within the card, while ideal solution being facilitation of faster GPU interfaces. Akira Nukada, Yasuhiko Ogata, Toshio Endo, Satoshi Matsuoka |
SC | 2 |