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Niccolò Rinaldi

dblp:42/5202 · also Niccolò F. Rinaldi · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 2017
0000-0001-6555-3712ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 89% Hardware reliability and fault tolerance · 11%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.312017
Si/SiGe: C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications · Proc. IEEE 2017
Integrated circuit design › semiconductor devices
heterojunction bipolar transistor
0.312017
Si/SiGe: C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications · Proc. IEEE 2017
Integrated circuit design
semiconductor device modeling
0.122017
Si/SiGe: C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications · Proc. IEEE 2017
Fast and simple method for calculating the minority-carrier current in arbitrarily doped semiconductors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Hardware reliability and fault tolerance
device reliability
0.112017
Si/SiGe: C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications · Proc. IEEE 2017

Methods — techniques the papers use, named apart from their topics

thermal modeling · 0.3HF measurement · 0.3numerical methods · 0.0
YearPublicationVenuePosition
2017 Si/SiGe: C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications
abstract
This paper presents Si/SiGe:C and InP/GaAsSb HBTs which feature specific assets to address submillimeter-wave and THz applications. Process and modeling status and challenges are reviewed. The specific topics of thermal and substrate effects, reliability, and HF measurements are also discussed.
Pascal Chevalier 0002, Michael Schröter, Colombo R. Bolognesi, Vincenzo d'Alessandro, Maria Alexandrova, Josef Bock, Ralf Flickiger, Sébastien Fregonese, Bernd Heinemann, Christoph Jungemann, Rickard Lovblom, Cristell Maneux, Olivier Ostinelli, Andreas Pawlak, Niccolò Rinaldi, Holger Rücker, Gerald Wedel, Thomas Zimmer
Proc. IEEE15
2012 An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines
abstract
In this paper, we present a transmission-line-based model developed to accurately describe the power and ground-line interconnections of modern digital ASICs. The proposed model employs transmission lines as the core component to properly describe both the capacitive and inductive behavior of the metal lines. In addition, the nonlinear frequency dependence of the line resistance, due to the skin-effect, is modeled with an additional lumped model. The model is completely derived from measurement data and allows describing both in-house and third-party ASICs. High-frequency$S$-parameter measured data are used to benchmark the model. Finally, on-board voltage measurements of a Numonyx 64 Mbit flash memory are performed and compared with transistor-level simulations.
Maurizio Costagliola, Davide De Caro, Antonio Girardi, Roberto Izzi, Niccolò Rinaldi, Marco Spirito, Paolo Spirito
IEEE Trans. Very Large Scale Integr. Syst.5
1996 Fast and simple method for calculating the minority-carrier current in arbitrarily doped semiconductors
abstract
A fast numerical method for evaluating the minority-carrier current injected into arbitrarily doped semiconductor regions is presented. The method is based on an efficient regional approach and is very easy to implement.
Niccolò Rinaldi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1